Patents by Inventor Yong-dae Ha

Yong-dae Ha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11482505
    Abstract: Embodiments in accordance with the present inventive concept disclose a chip bonding apparatus that includes a stage configured to support a substrate and a heater that is disposed above the stage. The heater includes a heat generating portion and a body portion. The chip bonding apparatus further includes a bonding tool assembly fixing unit having a first portion connected to the body portion of the heater, and a second portion configured to receive the heat generating portion. The chip bonding apparatus further includes a first bonding tool connected to the heat generating portion; and a first bonding tool fixing unit having a third portion that is connected to the first portion, and a fourth portion configured to receive the first bonding tool. The bonding tool fixing unit may be attached by an electrostatic force or by coupling between a notch gripper and a corresponding notch.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: October 25, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Cheol Kim, Gil Man Kang, Yong Dae Ha
  • Publication number: 20200312811
    Abstract: Embodiments in accordance with the present inventive concept disclose a chip bonding apparatus that includes a stage configured to support a substrate and a heater that is disposed above the stage. The heater includes a heat generating portion and a body portion. The chip bonding apparatus further includes a bonding tool assembly fixing unit having a first portion connected to the body portion of the heater, and a second portion configured to receive the heat generating portion. The chip bonding apparatus further includes a first bonding tool connected to the heat generating portion; and a first bonding tool fixing unit having a third portion that is connected to the first portion, and a fourth portion configured to receive the first bonding tool. The bonding tool fixing unit may be attached by an electrostatic force or by coupling between a notch gripper and a corresponding notch.
    Type: Application
    Filed: September 25, 2019
    Publication date: October 1, 2020
    Inventors: Jae-Cheol KIM, Gil Man KANG, Yong Dae HA
  • Patent number: 10692833
    Abstract: A bonding apparatus includes a detecting unit configured to determine whether a bonding head and a stage, on which a package substrate is disposed, are sufficiently parallel to each other during a bonding process, wherein the bonding head is configured to bond a semiconductor chip to the package substrate, and a correcting unit configured to adjust at least one of the bonding head or the stage based on the determination of the detecting unit during the bonding process.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: June 23, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Cheol Kim, Gil-Man Kang, Kyoung-Bok Cho, Yong-Dae Ha
  • Patent number: 10330722
    Abstract: Semiconductor module testing equipment includes a test board, a plurality of pipe structures extending from an upper surface of the test board in a first direction and spaced apart from one another in a second direction that intersects the first direction, wherein the first and second directions are substantially parallel to a plane of the test board, at least one semiconductor module socket disposed between a pair of neighboring pipe structures of the plurality of pipe structures, and a plurality of nozzles disposed on each pipe structure of the plurality of pipe structures, wherein the plurality of nozzles is configured to discharge a fluid laterally.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: June 25, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-woo Kim, Yong-dae Ha, Chang-ho Lee, Seul-ki Han
  • Publication number: 20180106853
    Abstract: Semiconductor module testing equipment includes a test board, a plurality of pipe structures extending from an upper surface of the test board in a first direction and spaced apart from one another in a second direction that intersects the first direction, wherein the first and second directions are substantially parallel to a plane of the test board, at least one semiconductor module socket disposed between a pair of neighboring pipe structures of the plurality of pipe structures, and a plurality of nozzles disposed on each pipe structure of the plurality of pipe structures, wherein the plurality of nozzles is configured to discharge a fluid laterally.
    Type: Application
    Filed: August 7, 2017
    Publication date: April 19, 2018
    Inventors: MIN-WOO KIM, Yong-dae HA, Chang-ho LEE, Seul-ki HAN
  • Publication number: 20180102340
    Abstract: A bonding apparatus includes a detecting unit configured to determine whether a bonding head and a stage, on which a package substrate is disposed, are sufficiently parallel to each other during a bonding process, wherein the bonding head is configured to bond a semiconductor chip to the package substrate, and a correcting unit configured to adjust at least one of the bonding head or the stage based on the determination of the detecting unit during the bonding process.
    Type: Application
    Filed: March 20, 2017
    Publication date: April 12, 2018
    Inventors: Jae-Cheol KIM, Gil-Man KANG, Kyoung-Bok CHO, Yong-Dae HA
  • Patent number: 9324661
    Abstract: An aligning guide, a semiconductor package comprising an aligning guide, and a method of manufacturing a semiconductor package comprising an aligning guide are provided. The semiconductor package may comprise a circuit board and an aligning guide mounted on the circuit board. The aligning guide may have a plurality of stepped portions. A plurality of semiconductor chips may be stacked on the circuit board and engage with the stepped portions of the aligning guide. According to the disclosed semiconductor package, a large number of semiconductor chips may be stacked with high accuracy and sufficient margin. Therefore, the rate of failure and defects in the chip stacking process may be reduced and the reliability and stability of the semiconductor package may be enhanced.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: April 26, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Doo-Jin Kim, Young-Sik Kim, Tea-Seog Um, Yong-Dae Ha
  • Publication number: 20150279787
    Abstract: An aligning guide, a semiconductor package comprising an aligning guide, and a method of manufacturing a semiconductor package comprising an aligning guide are provided. The semiconductor package may comprise a circuit board and an aligning guide mounted on the circuit board. The aligning guide may have a plurality of stepped portions. A plurality of semiconductor chips may be stacked on the circuit board and engage with the stepped portions of the aligning guide. According to the disclosed semiconductor package, a large number of semiconductor chips may be stacked with high accuracy and sufficient margin. Therefore, the rate of failure and defects in the chip stacking process may be reduced and the reliability and stability of the semiconductor package may be enhanced.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 1, 2015
    Inventors: Doo-Jin KIM, Young-Sik KIM, Tea-Seog UM, Yong-Dae HA
  • Patent number: 8042593
    Abstract: A semiconductor chip bonding apparatus maintains a semiconductor chip in a parallel state with respect to a lead frame when applying a bonding load.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: October 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheal-Sang Yoon, Yong-Dae Ha, Jae-Ryoung Lee, Jeong-Soon Cho, Bum-Woo Lee, Pil-June Kim
  • Publication number: 20090035105
    Abstract: Provided are an apparatus, method for separating a chip and a method for fabricating the apparatus. An apparatus for separating a chip, according to example embodiments, may include a suction holder. The suction holder may include an upper surface with at least one suction hole to suction and fix an adhesive tape to which a plurality of semiconductor chips may be attached. The apparatus for separating a chip may also include a rotatable plunger in the suction holder. The rotatable plunger may include an upper end configured to pass through the at least one suction hole and to project over the suction holder upon rotation of the rotatable plunger. The apparatus for separating a chip may also include a vertically movable plunger lifter. The vertically movable plunger lifter may be configured to rotate the rotatable plunger by contacting and raising a lower end of the rotatable plunger.
    Type: Application
    Filed: July 25, 2008
    Publication date: February 5, 2009
    Inventors: Cheal-Sang Yoon, Yong-Dae Ha, Jae-Ryoung Lee, Jeong-Soon Cho, Bum-Woo Lee, Young-Gon Hwang, Mok-Kun Kwon
  • Publication number: 20090020229
    Abstract: A semiconductor chip bonding apparatus maintains a semiconductor chip a parallel state with a lead frame when applying a bonding load.
    Type: Application
    Filed: July 17, 2008
    Publication date: January 22, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Cheal-Sang YOON, Yong-Dae Ha, Jae-Ryoung Lee, Jeong-Soon Cho, Bum-Woo Lee, Pil-June Kim
  • Publication number: 20080000587
    Abstract: A bonding apparatus for a semiconductor package determines whether a bottom of a bonding head is contaminated, and may include a contamination detecting unit for a bonding head attached to a body to apply pressure to the semiconductor package. The contamination detecting unit is below the bonding head to detect contamination on the bottom of the bonding head, a bonding block, and a bonding stage.
    Type: Application
    Filed: February 26, 2007
    Publication date: January 3, 2008
    Inventors: Yong-dae Ha, Cheal-sang Yoon, Jeong-soon Cho, Bum-woo Lee, Young-gon Hwang, Mok-kun Kwon
  • Patent number: 6187121
    Abstract: Die-bonding equipment and a method for detecting adhesive dotting on a substrate are disclosed. A dotted adhesive pattern illustrating an actually dotted state of the adhesive on a substrate is overlap-photographed with a standard pattern illustrating proper dotting pattern. The overlap-photographed pattern is compared with a standard overlap pattern. According to the compared result, whether the adhesive is properly dotted on the substrate is decided. When the adhesive is not properly dotted, an alarm signal is generated.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: February 13, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-bok Hong, Yong-choul Lee, Yong-dae Ha, Young-gon Hwang