Abstract: The present invention provides a method for measuring the interface state density by a conductance technique. In particular, the method comprises: biasing a MOS capacitor structure to be measured in an accumulation region, measuring the MOS capacitor structure under a fixed bias voltage and at predetermined scanning frequencies in the accumulation region by using a Gp-G model, and calculating the values of the series resistor at respective predetermined scanning frequencies to obtain a series resistor model; obtaining an accurate model in an inversion region from the series resistor model varying with the predetermined scanning frequencies obtained in the accumulation region and obtaining the measurement results of interface state according to the accurate model.

Abstract: The present invention provides a CML to CMOS conversion circuit comprising a first differential unit, a second differential unit, and an output unit. The output unit comprises a series connection of a first inverter and a second inverter, wherein, a resistor is connected with the first inverter in parallel. The CML to CMOS conversion circuit of the present invention omits the amplifier in the conventional circuit and reduces the delay time to 34 ps, which is almost half of the delay time of 64 ps in the conventional circuit, and thus provides more clock delay redundancy for the high speed parallel-serial conversion circuit.

Abstract: The present invention provides a CML to CMOS conversion circuit comprising a first differential unit, a second differential unit, and an output unit. The output unit comprises a series connection of a first inverter and a second inverter, wherein, a resistor is connected with the first inverter in parallel. The CML to CMOS conversion circuit of the present invention omits the amplifier in the conventional circuit and reduces the delay time to 34 ps, which is almost half of the delay time of 64 ps in the conventional circuit, and thus provides more clock delay redundancy for the high speed parallel-serial conversion circuit.

Abstract: The present invention provides a method for measuring the interface state density by a conductance technique. In particular, the method comprises: biasing a MOS capacitor structure to be measured in an accumulation region, measuring the MOS capacitor structure under a fixed bias voltage and at predetermined scanning frequencies in the accumulation region by using a Gp-G model, and calculating the values of the series resistor at respective predetermined scanning frequencies to obtain a series resistor model; obtaining an accurate model in an inversion region from the series resistor model varying with the predetermined scanning frequencies obtained in the accumulation region and obtaining the measurement results of interface state according to the accurate model.