Patents by Inventor Yong-Hong Chen

Yong-Hong Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6423587
    Abstract: A semiconductor wafer has a silicon substrate, at least one active area, a shallow trench isolation positioned on the silicon substrate surrounding the active area, and a first oxide layer positioned on the substrate surface within the active area. A first conductive layer is formed in a predetermined area within the active area, then the LDD of the MOS transistor is formed in the silicon substrate that is not covered by the first conductive layer. A second oxide layer, approximately flush with the top of the first conductive layer, is formed on the surface of the semiconductor wafer, and a second conductive layer is formed on the surface of the second oxide layer. Portions of the second conductive layer and the second oxide layer are removed to ensure that the residual second conductive layer and the first conductive layer form a T-shaped gate. Finally, the source and the drain of the MOS transistor are formed on the silicon substrate within the active area.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: July 23, 2002
    Assignee: AMIC Technology (Taiwan) Inc.
    Inventor: Yong-Hong Chen