Patents by Inventor Yonghui Tang
Yonghui Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240137198Abstract: A receiver includes: equalizer circuitry; clock and data recovery (CDR) circuitry; sampler circuitry; adaptation circuitry; and clock adjustment circuitry. The receiver is configured to: receive data via a channel; perform equalization operations on received data, the equalization operations resulting in equalization results; perform sampling operations responsive to the equalization results, the sampling operations resulting in data samples and error samples; perform adaptation operations responsive to the data samples and the error samples, the adaptation operations resulting in a clock adjustment control signal; and adjust a sampling clock signal relative to a CDR clock signal responsive to the clock adjustment control signal.Type: ApplicationFiled: April 27, 2023Publication date: April 25, 2024Inventors: Abishek MANIAN, Ashkan ROSHAN ZAMIR, Yonghui TANG, Robin GUPTA, Michael G. VRAZEL
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Publication number: 20240125969Abstract: The present disclosure provides a method for experimentally determining a critical sand-carrying gas velocity of a shale gas well. The method includes: collecting well structure and production data, calculating parameter ranges of a gas flow velocity and a liquid flow velocity; carrying out a physical simulation experiment of sand carrying in the shale gas well to obtain the sand holding capacity of the wellbore under different experimental conditions, and calculating a sand holding rate; by observing a change curve of the sand holding rate of the wellbore vs. the gas flow velocity, defining a turning point, and sensitively analyzing the influence of other experimental variables on the turning point, to calculate the critical sand-carrying production of the shale gas well under different conditions. Therefore, this calculation method is simple and applicable, and provides a theoretical basis for the optimization design of water drainage and gas production process.Type: ApplicationFiled: December 18, 2023Publication date: April 18, 2024Applicant: Southwest Petroleum UniversityInventors: Yonghui Liu, Jinhong Jiang, Chengcheng Luo, Ning Wu, Xuanzhi Zheng, Xinke Tang, Xin Li, Zhengyang Liu, Boren Yang, Tianjian Liu
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Patent number: 11580053Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.Type: GrantFiled: June 15, 2021Date of Patent: February 14, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Suzanne Mary Vining, Yonghui Tang, Douglas Edward Wente, Huanzhang Huang
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Publication number: 20230039848Abstract: In an embodiment, a current source is coupled to a first current terminal of a switch, the second current terminal of which is coupled to a first data line in a communication system. An edge detector has a first input, a second input, and an output, in which the first input is coupled to a second data line in the communication system, the second input is coupled to the first data line, and the output is coupled to a control terminal of the switch. The first and second data lines may be positive and negative data lines, respectively, of the communication system.Type: ApplicationFiled: October 19, 2022Publication date: February 9, 2023Inventors: Yonghui TANG, Yanli FAN
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Publication number: 20220157222Abstract: An example apparatus includes: a first input and a second input, a first equalizer with a third input, a fourth input, and a fifth input, the third input coupled to the first input, the fourth input coupled to the second input, a second equalizer with a sixth input, a seventh input, and an eighth input, the sixth input coupled to the first input, the seventh input coupled to the second input, and a controller coupled to the fifth input and the eighth input.Type: ApplicationFiled: November 15, 2021Publication date: May 19, 2022Inventors: Yonghui Tang, Charles Michael Campbell, Mustafa Ulvi Erdogan, Douglas Edward Wente, Yanli Fan
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Publication number: 20210311898Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.Type: ApplicationFiled: June 15, 2021Publication date: October 7, 2021Inventors: Win Naing MAUNG, Yonghui TANG, Huanzhang HUANG, Douglas Edward WENTE
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Publication number: 20210311903Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.Type: ApplicationFiled: June 15, 2021Publication date: October 7, 2021Inventors: Win Naing MAUNG, Suzanne Mary VINING, Yonghui TANG, Douglas Edward WENTE, Huanzhang HUANG
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Patent number: 11068435Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.Type: GrantFiled: January 24, 2020Date of Patent: July 20, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Suzanne Mary Vining, Yonghui Tang, Douglas Edward Wente, Huanzhang Huang
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Patent number: 11068428Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.Type: GrantFiled: May 16, 2019Date of Patent: July 20, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Win Naing Maung, Yonghui Tang, Huanzhang Huang, Douglas Edward Wente
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Patent number: 10972081Abstract: Aspects of the disclosure provide for a method. In some examples, the method includes detecting a transition in an input signal (IN), generating a bias current based on the detected transition in IN, and modifying a charge status of a capacitor based on the charge current. The method further includes generating an output signal (OUT) based on the charge status of the capacitor, disabling the bias current generation based on values of IN and OUT, and strongly pulling the capacitor up or down based on the disabling the bias current generation.Type: GrantFiled: February 28, 2020Date of Patent: April 6, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yanfei Jiang, Huanzhang Huang, Yonghui Tang, Shita Guo
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Publication number: 20200327082Abstract: In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.Type: ApplicationFiled: June 29, 2020Publication date: October 15, 2020Inventors: Yonghui TANG, Yanli FAN
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Patent number: 10782717Abstract: A jitter compensation circuit operates in a first conduction state responsive to a high-to low transition of data and a low-to-high transition of data. The circuit operates in a second conduction state when there is no transition of data. The circuit compensates charge to a voltage supply in the first conduction state, thereby reducing voltage drop caused by transition of data.Type: GrantFiled: October 18, 2019Date of Patent: September 22, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Jikai Chen, Yonghui Tang, Yuan Rao, Huanzhang Huang, Yanli Fan
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Patent number: 10733129Abstract: In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.Type: GrantFiled: May 1, 2018Date of Patent: August 4, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yonghui Tang, Yanli Fan
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Publication number: 20200242071Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.Type: ApplicationFiled: January 24, 2020Publication date: July 30, 2020Inventors: Win Naing MAUNG, Suzanne Mary VINING, Yonghui TANG, Douglas Edward WENTE, Huanzhang HUANG
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Publication number: 20200204165Abstract: Aspects of the disclosure provide for a method. In some examples, the method includes detecting a transition in an input signal (IN), generating a bias current based on the detected transition in IN, and modifying a charge status of a capacitor based on the charge current. The method further includes generating an output signal (OUT) based on the charge status of the capacitor, disabling the bias current generation based on values of IN and OUT, and strongly pulling the capacitor up or down based on the disabling the bias current generation.Type: ApplicationFiled: February 28, 2020Publication date: June 25, 2020Inventors: Yanfei JIANG, Huanzhang HUANG, Yonghui TANG, Shita GUO
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Patent number: 10622979Abstract: Aspects of the disclosure provide for a method. In some examples, the method includes detecting a transition in an input signal (IN), generating a bias current based on the detected transition in IN, and modifying a charge status of a capacitor based on the charge current. The method further includes generating an output signal (OUT) based on the charge status of the capacitor, disabling the bias current generation based on values of IN and OUT, and strongly pulling the capacitor up or down based on the disabling the bias current generation.Type: GrantFiled: March 28, 2019Date of Patent: April 14, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yanfei Jiang, Huanzhang Huang, Yonghui Tang, Shita Guo
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Publication number: 20200059224Abstract: Aspects of the disclosure provide for a method. In some examples, the method includes detecting a transition in an input signal (IN), generating a bias current based on the detected transition in IN, and modifying a charge status of a capacitor based on the charge current. The method further includes generating an output signal (OUT) based on the charge status of the capacitor, disabling the bias current generation based on values of IN and OUT, and strongly pulling the capacitor up or down based on the disabling the bias current generation.Type: ApplicationFiled: March 28, 2019Publication date: February 20, 2020Inventors: Yanfei JIANG, Huanzhang HUANG, Yonghui TANG, Shita GUO
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Publication number: 20200057742Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.Type: ApplicationFiled: May 16, 2019Publication date: February 20, 2020Inventors: Win Naing MAUNG, Yonghui TANG, Huanzhang HUANG, Douglas Edward WENTE
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Patent number: 10394740Abstract: An apparatus includes a transistor with a control terminal, a first current terminal, and a second current terminal. The apparatus also includes a charge pump coupled to the control terminal of the transistor via a first and second paths. The first path comprises a first resistor and the second path comprises a second resistor in series with a diode. The first resistor has a higher resistance value than the second resistor.Type: GrantFiled: September 10, 2018Date of Patent: August 27, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Shita Guo, Yanli Fan, Huanzhang Huang, Yonghui Tang, Yanfei Jiang
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Publication number: 20190213158Abstract: In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.Type: ApplicationFiled: May 1, 2018Publication date: July 11, 2019Inventors: Yonghui TANG, Yanli FAN