Patents by Inventor Yongjae Shin

Yongjae Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Clock transfer circuit including a semiconductor device for compensating delay fluctuation
    Patent number: 11936386
    Abstract: A clock transfer circuit includes a first stage circuit configured to produce an output signal that uses a second signaling technology from an input signal that uses a first signaling technology; and a second stage circuit configured to produce a clock signal by delaying the output signal; wherein the first stage circuit includes a semiconductor device configured to compensate for delay fluctuation caused by fluctuation of power supply voltage between a first power source and a second power source.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: March 19, 2024
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Soyeong Shin, Yongjae Lee, Jiheon Park, Deog-Kyoon Jeong
  • Memory systems with ZQ global management and methods of operating same
    Patent number: 10284198
    Abstract: A memory system includes a memory module and a memory controller. The memory module includes a plurality of memory devices with corresponding ZQ calibration circuits therein. The memory controller, which is electrically coupled to the memory module, includes a ZQ global managing circuit therein. This ZQ global managing circuit is configured to determine a plurality of calibration values associated the corresponding ZQ calibration circuits in the plurality of memory devices, in response to calibration result data generated by the plurality of ZQ calibration circuits. The memory module is mounted within a memory slot. In addition, the plurality of calibration values account for signal loading characteristics of the memory module within the memory slot.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: May 7, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Yeol Lee, Seokil Kim, Hoiju Chung, Yongjae Shin, YouKeun Han
  • MEMORY SYSTEMS WITH ZQ GLOBAL MANAGEMENT AND METHODS OF OPERATING SAME
    Publication number: 20170099050
    Abstract: A memory system includes a memory module and a memory controller. The memory module includes a plurality of memory devices with corresponding ZQ calibration circuits therein. The memory controller, which is electrically coupled to the memory module, includes a ZQ global managing circuit therein. This ZQ global managing circuit is configured to determine a plurality of calibration values associated the corresponding ZQ calibration circuits in the plurality of memory devices, in response to calibration result data generated by the plurality of ZQ calibration circuits. The memory module is mounted within a memory slot. In addition, the plurality of calibration values account for signal loading characteristics of the memory module within the memory slot.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 6, 2017
    Inventors: Sang-Yeol Lee, Seokil Kim, Hoiju Chung, Yongjae Shin, YouKeun Han