Abstract: A lens driving device according to an embodiment includes a first frame; a first moving part disposed in an inner space of the first frame and relatively movable with respect to the first frame; a lens module disposed inside the first moving part; and a guide member disposed between the first frame and the first moving part, wherein the guide member is disposed between an inner surface of the first frame and an outer surface of the first moving part, and the first moving part is guided by the guide member and arranged to be rotatable based on each of a first axis and a second axis.

Abstract: A method for operating a service function chain in a networking function virtualization device includes: a step a of generating at least one service function chain providing at least one virtual network function, and defining traffic to which the service function chain is applied; a step b of setting an NIC to allocate SR-IOV for the start and end of the service function chain applied to first traffic; and a step c of setting a software switch to apply a flow rule for leading the first traffic to provide the intermediate step of the service function chain to the first traffic.

Abstract: A buffer amplifier circuit includes a buffer amplifier including a first differential amplifier having a first active load and a second differential amplifier having a second active load and a feedback circuit configured to feed an output signal of an output terminal of the buffer amplifier back to one of the first and second active loads using differential switch signals and an input signal of the buffer amplifier to enhance a slew rate of the output signal.

Abstract: A power on/off reset circuit includes a driving circuit, a hysteresis control circuit and a buffering circuit. The driving circuit detects a first level of a power supply voltage during a power-on duration of the power supply voltage, detects a second level of the power supply voltage during a power-off duration of the power supply voltage, and generates a driving signal that is transitioned based on the first level and the second level. The hysteresis control circuit is connected to an output terminal of the driving circuit, is activated or deactivated based on the power supply voltage without a control signal, is activated during one of the power-on duration and the power-off duration, and is deactivated during the other of the power-on duration and the power-off duration. The buffering circuit is connected to the output terminal of the driving circuit, and generates a reset signal based on the driving signal.

Abstract: A network function virtualization (NFV) apparatus according to the present disclosure may include: a virtual machine which is configured to perform a first network function, generate a flow rule according to network configuration information received from a user or a result of performing the first network function, and transmit the flow rule to a software switch; and the software switch which is configured to perform a second network function, and process a packet according to the flow rule. According to the present disclosure, separate a virtual network function may be separated into a data (packet) processing function and a control function, whereby a fast processing speed provided by a software switch and virtual machine's processing capability with high complexity may be maximally utilized.

Abstract: A power on/off reset circuit includes a driving circuit, a hysteresis control circuit and a buffering circuit. The driving circuit detects a first level of a power supply voltage during a power-on duration of the power supply voltage, detects a second level of the power supply voltage during a power-off duration of the power supply voltage, and generates a driving signal that is transitioned based on the first level and the second level. The hysteresis control circuit is connected to an output terminal of the driving circuit, is activated or deactivated based on the power supply voltage without a control signal, is activated during one of the power-on duration and the power-off duration, and is deactivated during the other of the power-on duration and the power-off duration. The buffering circuit is connected to the output terminal of the driving circuit, and generates a reset signal based on the driving signal.

Abstract: A source driver includes a buffer device including a plurality of buffers corresponding to a plurality of data lines, each of the plurality of buffers respectively including an amplifier configured to amplify an input signal and an output driver configured to output a driving signal to a corresponding data line among the plurality of data lines; and a switch device including a charge sharing switch configured to electrically connect the plurality of data lines to one another during a charge sharing operation, each of the amplifiers including a first current mirror having a reference current path including a first node and an output current path including a second node, and the first node of the reference current path and the second node of the output current path are electrically connected to each other during the charge sharing operation.

Abstract: A source driver includes a buffer device including a plurality of buffers corresponding to a plurality of data lines, each of the plurality of buffers respectively including an amplifier configured to amplify an input signal and an output driver configured to output a driving signal to a corresponding data line among the plurality of data lines; and a switch device including a charge sharing switch configured to electrically connect the plurality of data lines to one another during a charge sharing operation, each of the amplifiers including a first current mirror having a reference current path including a first node and an output current path including a second node, and the first node of the reference current path and the second node of the output current path are electrically connected to each other during the charge sharing operation.

Abstract: A buffer amplifier circuit includes a buffer amplifier including a first differential amplifier having a first active load and a second differential amplifier having a second active load and a feedback circuit configured to feed an output signal of an output terminal of the buffer amplifier back to one of the first and second active loads using differential switch signals and an input signal of the buffer amplifier to enhance a slew rate of the output signal.

Abstract: A control apparatus which manages a software defined network including a plurality of switches includes a security management module that authenticates at least one application program, and an application program management module that executes the authenticated application program among the at least one application program in a first process, and executes the application program whose authentication fails in a second process. The application program management module may be executed in the first process, and the first process may be different from the second process.

Abstract: A control apparatus which manages a software defined network including a plurality of switches includes a security management module that authenticates at least one application program, and an application program management module that executes the authenticated application program among the at least one application program in a first process, and executes the application program whose authentication fails in a second process. The application program management module may be executed in the first process, and the first process may be different from the second process.

Abstract: The present invention relates to a base pad layout for reducing the parasitic base-collector capacitance and method of fabricating HBT using the same.