Patents by Inventor Yongkui ZHANG

Yongkui ZHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240021483
    Abstract: The disclosed technology provides a semiconductor device, a manufacturing method thereof, and an electronic device including the device. An example semiconductor device includes a substrate; a first device and a second device on the substrate. Each of the first device and the second device include a first source/drain layer, a channel layer, and a second source layer that are sequentially stacked, from bottom to top, on the substrate, and a gate stack around at least a part of an outer periphery of the channel layer, with sidewalls of the respective channel layers of the first device and the second device extending at least partially along different crystal planes or crystal plane families.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 18, 2024
    Inventors: Huilong ZHU, Yongkui ZHANG, Xiaogen YIN, Chen LI, Yongbo LIU, Kunpeng JIA
  • Patent number: 11827988
    Abstract: An embodiment of the present disclosure provides an etching method, having the following steps: forming a modified layer having a thickness of one or several atom layers on a selected region of a surface of a semiconductor material layer by using a modifier; and removing the modified layer. When a semiconductor is processed, this method achieves precise control over the etching thickness and improves the etching rate at the same time.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: November 28, 2023
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Huilong Zhu, Xiaogen Yin, Chen Li, Anyan Du, Yongkui Zhang
  • Publication number: 20230187497
    Abstract: A semiconductor apparatus having a staggered structure, a method of manufacturing a semiconductor apparatus, and an electronic device including the semiconductor apparatus. The semiconductor apparatus includes a first element and a second element on a substrate. The first element and the second element each include a comb-shaped structure. The comb-shaped structure includes a first portion extending in a vertical direction relative to the substrate, and at least one second portion extending from the first portion in a lateral direction relative to the substrate and spaced from the substrate. A height of the second portion of the first element in the vertical direction is staggered with respect to a height of the second portion of the second element in the vertical direction. A material of the comb-shaped structure of the first element is different from a material of the comb-shaped structure of the second element.
    Type: Application
    Filed: March 18, 2021
    Publication date: June 15, 2023
    Inventors: Huilong ZHU, Xuezheng AI, Yongkui ZHANG
  • Publication number: 20220389591
    Abstract: An embodiment of the present disclosure provides an etching method, having the following steps: forming a modified layer having a thickness of one or several atom layers on a selected region of a surface of a semiconductor material layer by using a modifier; and removing the modified layer. When a semiconductor is processed, this method achieves precise control over the etching thickness and improves the etching rate at the same time.
    Type: Application
    Filed: August 18, 2022
    Publication date: December 8, 2022
    Inventors: Huilong ZHU, Xiaogen YIN, Chen LI, Anyan DU, Yongkui ZHANG
  • Patent number: 11447876
    Abstract: An embodiment of the present disclosure provides an etching method, having the following steps: forming a modified layer having a thickness of one or several atom layers on a selected region of a surface of a semiconductor material layer by using a modifier; and removing the modified layer. When a semiconductor is processed, this method achieves precise control over the etching thickness and improves the etching rate at the same time.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: September 20, 2022
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Huilong Zhu, Xiaogen Yin, Chen Li, Anyan Du, Yongkui Zhang
  • Publication number: 20220102559
    Abstract: Disclosed are a semiconductor device, a method of manufacturing the semiconductor device, and an electronic apparatus including the semiconductor device. The semiconductor device may include: a substrate; an active region extending vertically on the substrate, wherein the active region includes a first source/drain layer, a channel layer and a second source/drain layer that are sequentially stacked; a gate stack formed around at least part of an outer peripheral sidewall of the channel layer. A sidewall of the gate stack close to the channel layer is aligned with the outer peripheral sidewall of the channel layer, so as to occupy substantially a same range in a vertical direction, and a part of the gate stack close to the channel layer has a shape that gradually tapers as getting close to the channel layer.
    Type: Application
    Filed: April 24, 2019
    Publication date: March 31, 2022
    Inventors: Huilong ZHU, Chen LI, Yongkui ZHANG
  • Publication number: 20210222303
    Abstract: An embodiment of the present disclosure provides an etching method, having the following steps: forming a modified layer having a thickness of one or several atom layers on a selected region of a surface of a semiconductor material layer by using a modifier; and removing the modified layer. When a semiconductor is processed, this method achieves precise control over the etching thickness and improves the etching rate at the same time.
    Type: Application
    Filed: September 21, 2018
    Publication date: July 22, 2021
    Inventors: Huilong ZHU, Xiaogen YIN, Chen LI, Anyan DU, Yongkui ZHANG
  • Publication number: 20210193533
    Abstract: The disclosed technology provides a semiconductor device, a manufacturing method thereof, and an electronic device including the device. An example semiconductor device includes a substrate; a first device and a second device on the substrate. Each of the first device and the second device include a first source/drain layer, a channel layer, and a second source layer that are sequentially stacked, from bottom to top, on the substrate, and a gate stack around at least a part of an outer periphery of the channel layer, with sidewalls of the respective channel layers of the first device and the second device extending at least partially along different crystal planes or crystal plane families.
    Type: Application
    Filed: October 31, 2018
    Publication date: June 24, 2021
    Inventors: Huilong ZHU, Yongkui ZHANG, Xiaogen YIN, Chen Li, Yongbo LIU, Kunpeng JIA
  • Patent number: 9431504
    Abstract: A semiconductor device is provided that has a plurality of Fin structures extending on a substrate along a first direction; a gate stack structure extending on the substrate along a second direction and across the plurality of Fin structures, wherein the gate stack structure comprises a gate conductive layer and a gate insulating layer, and the gate conductive layer is formed by a doped poly-semiconductor; trench regions in the plurality of Fin structures and beneath the gate stack structure; and source/drain regions on the plurality of Fin structures and at both sides of the gate stack structure along the first direction. A method of manufacturing a semiconductor device is also provided.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: August 30, 2016
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Huaxiang Yin, Yongkui Zhang, Zhiguo Zhao, Zhiyong Lu, Huilong Zhu
  • Publication number: 20160087063
    Abstract: A semiconductor device is provided that has a plurality of Fin structures extending on a substrate along a first direction; a gate stack structure extending on the substrate along a second direction and across the plurality of Fin structures, wherein the gate stack structure comprises a gate conductive layer and a gate insulating layer, and the gate conductive layer is formed by a doped poly-semiconductor; trench regions in the plurality of Fin structures and beneath the gate stack structure; and source/drain regions on the plurality of Fin structures and at both sides of the gate stack structure along the first direction. A method of manufacturing a semiconductor device is also provided.
    Type: Application
    Filed: April 27, 2015
    Publication date: March 24, 2016
    Inventors: Huaxiang Yin, Yongkui Zhang, Zhiguo Zhao, Zhiyong Lu, Huilong Zhu
  • Publication number: 20160087062
    Abstract: A semiconductor device includes: a plurality of fin structures extending on a substrate along a first direction; a gate stack structure extending on the substrate along a second direction and across the plurality of fin structures, wherein the gate stack structure includes a gate conductive layer and a gate insulating layer, and the gate conductive layer is formed by a doped poly-semiconductor; trench regions in the plurality of fin structures and beneath the gate stack structure; and source/drain regions on the plurality of fin structures and at both sides of the gate stack structure along the first direction.
    Type: Application
    Filed: April 16, 2015
    Publication date: March 24, 2016
    Inventors: Huaxiang YIN, Yongkui ZHANG, Zhiguo ZHAO, Zhiyong LU, Huilong ZHU