Patents by Inventor Yongkun JO

Yongkun JO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250040282
    Abstract: An image sensor includes a substrate region having a photoelectric conversion region and a floating diffusion region therein. The floating diffusion region is configured to receive charges generated in the photoelectric conversion region in response to light incident the photoelectric conversion region. First and second horizontal conductive lines are provided that extend on the substrate region, but at different heights relative to a surface of the substrate region. The first horizontal conductive line is electrically connected to the floating diffusion region and has a thickness smaller than a thickness of the second horizontal conductive line. In addition, the first horizontal conductive line extends closer to the substrate region than the second horizontal conductive line.
    Type: Application
    Filed: April 5, 2024
    Publication date: January 30, 2025
    Inventors: Jihun LIM, Sungki MIN, Chang Kyu LEE, Yongkun JO
  • Publication number: 20250031476
    Abstract: An image sensor includes a first semiconductor chip including a first semiconductor substrate including a plurality of pixels and a first wiring structure having a first bonding pad; a second semiconductor chip including a second semiconductor substrate having pixel signal generator circuits, a second wiring structure on the second semiconductor substrate and having an upper bonding pad bonded to the first bonding pad, a back side insulating layer on a lower surface of the second semiconductor substrate and including a shielding metal pattern buried therein, and a conductive through-via penetrating the back side insulating layer and the first semiconductor substrate, and a third semiconductor chip including a bonding layer having a lower bonding pad connected to the conductive through via, a third semiconductor substrate including logic devices, and a third wiring structure having a third bonding pad bonded to the lower bonding pad.
    Type: Application
    Filed: May 21, 2024
    Publication date: January 23, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Minho JANG, Jonghyun GO, Doowon KWON, Changkyu LEE, Yongkun JO