Patents by Inventor Yongliang JIN

Yongliang JIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240387508
    Abstract: A method includes receiving a first power voltage at a gate and first terminal of a first transistor having a second terminal connected to a first node, the first power being gated to provide voltage in a first or a second state; receiving a voltage at a gate of a second transistor coupled between the first node and a ground node; receiving a second power voltage at a follower circuit coupled to the first node; turning on the second transistor to pull the first node toward ground, when the first power voltage is in the first state; turning off the second transistor when the first power voltage is in the second state; and discharging parasitic noise voltage of the first node through the first transistor during at least part of a period in which the first power voltage is in the second state and less than the second power voltage.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Inventors: Kai ZHOU, Yaqi MA, Wei LI, Yongliang JIN, CunCun CHEN
  • Patent number: 12119340
    Abstract: A circuit (to shape a follower voltage for a follower circuit) includes a tie-low circuit and an anti-noise circuit. The tie-low circuit is connected between a follower node and a first reference voltage. The tie-low circuit is responsive to a second reference voltage. The follower node is connectable to the follower circuit. The anti-noise circuit is connected between the follower node and the second reference voltage. The anti-noise circuit is configured to protect the follower voltage at the follower node from otherwise being distorted by a noise voltage being coupled capacitively to the follower node.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: October 15, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC CHINA COMPANY, LIMITED
    Inventors: Kai Zhou, Yaqi Ma, Wei Li, Yongliang Jin, CunCun Chen
  • Publication number: 20230344346
    Abstract: A circuit includes a power supply node, a reference node, an output node, a first transistor coupled between the power supply and output nodes, and an amplifier including a non-inverting input coupled to the power supply node through a first passive device, an inverting input coupled to the reference node through a second passive device, and an output coupled to a gate of the first transistor. A first inverter is coupled between the output and reference nodes and generates a mode control signal responsive to a mode select signal, a first switching device is configured to, responsive to the mode control signal, selectively couple the non-inverting input of the amplifier to the reference node through a third passive device, and a second switching device is configured to, responsive to the mode control signal, selectively couple the inverting input of the amplifier to the output node through a fourth passive device.
    Type: Application
    Filed: June 28, 2023
    Publication date: October 26, 2023
    Inventors: Wei LI, Yongliang JIN, Yaqi MA
  • Patent number: 11695339
    Abstract: A circuit includes an output node and an amplifier and first and second branches coupled between power supply and reference nodes. The first branch includes a first switching device coupled between a first amplifier input and the reference node, the second branch includes a second switching device coupled between the output node and a second amplifier input, and a third switching device is coupled between the power supply and output nodes. Responsive to a first voltage level on the power supply node, each of the first and second switching devices is switched off and the third switching device is switched on, and responsive to a second voltage level on the power supply node greater than the first voltage level, each of the first and second switching devices is switched on and the third switching device is switched off.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: July 4, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC CHINA COMPANY, LIMITED
    Inventors: Wei Li, Yongliang Jin, Yaqi Ma
  • Publication number: 20230092315
    Abstract: A circuit (to shape a follower voltage for a follower circuit) includes a tie-low circuit and an anti-noise circuit. The tie-low circuit is connected between a follower node and a first reference voltage. The tie-low circuit is responsive to a second reference voltage. The follower node is connectable to the follower circuit. The anti-noise circuit is connected between the follower node and the second reference voltage. The anti-noise circuit is configured to protect the follower voltage at the follower node from otherwise being distorted by a noise voltage being coupled capacitively to the follower node.
    Type: Application
    Filed: October 26, 2021
    Publication date: March 23, 2023
    Inventors: Kai ZHOU, Yaqi MA, Wei LI, Yongliang JIN, CunCun CHEN
  • Publication number: 20230083606
    Abstract: A circuit includes an output node and an amplifier and first and second branches coupled between power supply and reference nodes. The first branch includes a first switching device coupled between a first amplifier input and the reference node, the second branch includes a second switching device coupled between the output node and a second amplifier input, and a third switching device is coupled between the power supply and output nodes. Responsive to a first voltage level on the power supply node, each of the first and second switching devices is switched off and the third switching device is switched on, and responsive to a second voltage level on the power supply node greater than the first voltage level, each of the first and second switching devices is switched on and the third switching device is switched off.
    Type: Application
    Filed: November 7, 2022
    Publication date: March 16, 2023
    Inventors: Wei LI, Yongliang JIN, Yaqi MA
  • Patent number: 11509224
    Abstract: A circuit includes a first passive device between supply and bias nodes, a first switching device and a second passive device between the bias and a reference node, a transistor between the supply and an output node, a third passive device and a second switching device between the output and a feedback node, a fourth passive device between the feedback and reference nodes, a third switching device between the supply and output nodes, and an amplifier controlling the transistor based on bias node and feedback node voltages. In a first mode, the first and second switching devices are off, the third switching device is on, and the supply node receives a first voltage level. In a second mode, the first and second switching devices are on, the third switching device is off, and a second voltage level greater than the first voltage level is received on the supply node.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: November 22, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC CHINA COMPANY, LIMITED
    Inventors: Wei Li, Yongliang Jin, Yaqi Ma
  • Patent number: 11446885
    Abstract: Disclosed is a friction-reducing and anti-wear composite material for a wading kinematic pair and a method of preparing the same. The friction-reducing and anti-wear composite material is prepared from carbon fiber (CF) among inorganic fillers, polyimide (PI) and polyether ether ketone (PEEK). These three materials are wet-mixed, dried and placed in a mold followed by curing by a heat press. The cured product is cooled and demolded to obtain the CF/PI/PEEK friction-reducing and anti-wear composite material for a wading kinematic pair. Tribological properties of the PEEK material are enhanced due to synergistic effect arising from hybrid organic-inorganic filling. The friction-reducing and anti-wear composite material provided in the invention has significantly reduced friction coefficient and wear volume loss under the seawater environment.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: September 20, 2022
    Assignee: Wuhan Research Institute Of Materials Protection
    Inventors: Haitao Duan, Tian Yang, Jian Li, Meng Yi, Jiesong Tu, Dan Jia, Shengpeng Zhan, Yongliang Jin, Jianwei Qi
  • Publication number: 20220255426
    Abstract: A circuit includes a first passive device between supply and bias nodes, a first switching device and a second passive device between the bias and a reference node, a transistor between the supply and an output node, a third passive device and a second switching device between the output and a feedback node, a fourth passive device between the feedback and reference nodes, a third switching device between the supply and output nodes, and an amplifier controlling the transistor based on bias node and feedback node voltages. In a first mode, the first and second switching devices are off, the third switching device is on, and the supply node receives a first voltage level. In a second mode, the first and second switching devices are on, the third switching device is off, and a second voltage level greater than the first voltage level is received on the supply node.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 11, 2022
    Inventors: Wei LI, Yongliang JIN, Yaqi MA
  • Publication number: 20200276773
    Abstract: Disclosed is a friction-reducing and anti-wear composite material for a wading kinematic pair and a method of preparing the same. The friction-reducing and anti-wear composite material is prepared from carbon fiber (CF) among inorganic fillers, polyimide (PI) and polyether ether ketone (PEEK). These three materials are wet-mixed, dried and placed in a mold followed by curing by a heat press. The cured product is cooled and demolded to obtain the CF/PI/PEEK friction-reducing and anti-wear composite material for a wading kinematic pair. Tribological properties of the PEEK material are enhanced due to synergistic effect arising from hybrid organic-inorganic filling. The friction-reducing and anti-wear composite material provided in the invention has significantly reduced friction coefficient and wear volume loss under the seawater environment.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 3, 2020
    Inventors: Haitao DUAN, Tian YANG, Jian LI, Meng YI, Jiesong TU, Dan JIA, Shengpeng ZHAN, Yongliang JIN, Jianwei QI