Patents by Inventor Yongmo Park

Yongmo Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MAPPING DATA FOR NODES IN A FIRST TRANSFORM NETWORK TO INPUT NODES OF NEAR-MEMORY PROCESSING UNITS IMPLEMENTING A SMALLER TRANSFORM NETWORK
    Publication number: 20250139444
    Abstract: Provided are computer program product, system, and method for mapping data for nodes in a first transform network to input nodes of near-memory processing units implementing a smaller transform network. A plurality of processing units, which are interconnected, receive input data for n input nodes for a second transform network to process at interlinked stages of nodes in the processing units. A mapping maps N input nodes for the first transform network to the n input nodes of the second transform network. N is greater than n and a plurality of the N input nodes of the first transform network map to one of the n input nodes of the second transform network. A transform manager uses the mapping to map the N input nodes to n input nodes and loads received input data for the n input nodes into the processing units to perform computations in the processing units.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 1, 2025
    Inventors: Aporva Amarnath, Subhankar Pal, Yongmo Park, Alper Buyuktosunoglu
  • MAPPING INPUT NODES IN A TRANSFORM NETWORK TO INPUT NODES OF A SMALLER TRANSFORM NETWORK
    Publication number: 20250139443
    Abstract: Provided are a computer program product, system, and method for mapping input nodes in a transform network to input nodes of a smaller transform network. A first transform network having N input nodes and successive columns of interlinked nodes at which input data is processed. A mapping is generated of the N input nodes to n input nodes of a second transform network implemented in processing tiles in a hardware unit, such that n is less than N and multiple of the N input nodes of the first transform network map to one of the n input nodes of the second transform network. The mapping is used to map the N input nodes of the first transform network to n input nodes of the second transform network implemented in hardware.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 1, 2025
    Inventors: Aporva Amarnath, Subhankar Pal, Yongmo Park, Alper Buyuktosunoglu
  • Memristors and related systems and methods
    Patent number: 11552246
    Abstract: Memristors, including memristors comprising a Schottky barrier, and related systems and methods are generally described.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: January 10, 2023
    Assignee: Massachusetts Institute of Technology
    Inventors: Jeehwan Kim, Hanwool Yeun, Scott Tan, Peng Lin, Yongmo Park, Chanyeol Choi
  • MEMRISTORS AND RELATED SYSTEMS AND METHODS
    Publication number: 20210226122
    Abstract: Memristors, including memristors comprising a Schottky barrier, and related systems and methods are generally described.
    Type: Application
    Filed: January 20, 2021
    Publication date: July 22, 2021
    Applicant: Massachusetts Institute of Technology
    Inventors: Jeehwan Kim, Hanwool Yeun, Scott Tan, Peng Lin, Yongmo Park, Chanyeol Choi, Jaekang Song