Abstract: Provided are a thin film transistor substrate which include a substrate, a buffer layer and a thin film transistor, a display apparatus including the thin film transistor substrate, and a method of manufacturing the display apparatus including the thin film transistor substrate. The buffer layer includes an inorganic insulating layer. An area ratio of a peak corresponding to an N—H bond in the buffer layer is 0.5% or less based on a total peak area in a Fourier transform infrared spectroscopy (FTIR).

Abstract: A display apparatus includes a substrate, a first light-emitting element disposed over the substrate to emit light, a first dummy light-emitting element disposed over the substrate to emit light of a same color as a color of the light emitted from the first light-emitting element, an input sensing layer disposed on the first light-emitting element and the first dummy light-emitting element, and a light-blocking layer disposed on the input sensing layer, where an opening is defined through the light-blocking layer to overlap the first light-emitting element, and the input sensing layer includes a diffraction structure disposed to overlap the first dummy light-emitting element.

Abstract: A pixel circuit includes a light-emitting element, a write transistor writing a data voltage, a driving transistor generating a driving current based on the data voltage and applying the driving current to the light-emitting element, a first initialization transistor applying a first initialization voltage to a control electrode of the driving transistor, a blocking transistor disposed between the light-emitting element and the driving transistor, a first blocking control transistor including a control electrode connected to the control electrode of the driving transistor, a first electrode receiving a first signal, and a second electrode connected to a control electrode of the blocking transistor, and a second blocking control transistor including a control electrode connected to the control electrode of the driving transistor, a first electrode receiving a second signal, and a second electrode connected to the control electrode of the blocking transistor.

Abstract: A pixel circuit includes a light-emitting element, a write transistor writing a data voltage, a driving transistor generating a driving current based on the data voltage and applying the driving current to the light-emitting element, a first initialization transistor applying a first initialization voltage to a control electrode of the driving transistor, a blocking transistor disposed between the light-emitting element and the driving transistor, a first blocking control transistor including a control electrode connected to the control electrode of the driving transistor, a first electrode receiving a first signal, and a second electrode connected to a control electrode of the blocking transistor, and a second blocking control transistor including a control electrode connected to the control electrode of the driving transistor, a first electrode receiving a second signal, and a second electrode connected to the control electrode of the blocking transistor.

Abstract: Provided are a thin film transistor substrate which include a substrate, a buffer layer and a thin film transistor, a display apparatus including the thin film transistor substrate, and a method of manufacturing the display apparatus including the thin film transistor substrate. The buffer layer includes an inorganic insulating layer. An area ratio of a peak corresponding to an N—H bond in the buffer layer is 0.5% or less based on a total peak area in a Fourier transform infrared spectroscopy (FTIR).

Abstract: Provided are a thin film transistor substrate which include a substrate, a buffer layer and a thin film transistor, a display apparatus including the thin film transistor substrate, and a method of manufacturing the display apparatus including the thin film transistor substrate. The buffer layer includes an inorganic insulating layer. An area ratio of a peak corresponding to an N—H bond in the buffer layer is 0.5% or less based on a total peak area in a Fourier transform infrared spectroscopy (FTIR).

Abstract: A cell module assembly is provided. The cell module assembly may include a plurality of cells that generates electrical energy, at least one heat plate interposed between the plurality of cells, to absorb heat from the plurality of cells, the at least one heat plate having a cooling channel defined at both ends thereof, and at least one cartridge to accommodate the plurality of cells and the at least one heat plate, the cooling channel being internally defined in the cartridge.