Abstract: A positive-and-negative-voltage charge pump circuit, comprising a clock generation module, a positive-voltage charge pump module, a transient enhancement module, and a negative-voltage charge pump module. The positive-voltage charge pump module generates a positive voltage according to a clock signal output by the clock generation module, and the transient enhancement module is used to sample the positive voltage and a power supply voltage, and convert same into currents for comparison, such that the negative-voltage charge pump module provides a switchable input voltage according to a comparison result. The negative-voltage charge pump module can quickly and reliably establish a negative voltage according to a clock signal output by the clock generation module, thereby improving the speed and efficiency of the negative-voltage charge pump module generating the negative voltage.

Abstract: Disclosed are an on-chip RC oscillator, a chip, and a communication terminal. The on-chip RC oscillator comprises a stabilized voltage supply module, an RC core oscillator module, a frequency sampling and conversion module, and a frequency trimming module. By means of the frequency sampling and conversion module, the clock frequency of the oscillator is sampled and detected in real time, and the sampled clock frequency is converted into a voltage signal, and then analog-to-digital conversion is performed to obtain a corresponding digital code, so that when the clock frequency changes, the frequency trimming module circuit converts said digital code into a control signal; a voltage having a suitable temperature coefficient is outputted for the RC core oscillator module; also, a zero temperature coefficient current of a suitable magnitude is outputted for the RC core oscillator module, so as to precisely calibrate the clock frequency.

Abstract: An overshoot-free fast start-up bandgap reference circuit (100), a chip, and an electronic device. The bandgap reference circuit (100) comprises a bias current generating unit (101) and a reference core unit (102), wherein an output end of the bias current generating unit (101) is connected to an input end of the reference core unit (102), the bias current generating unit (101) generates a bias current (IBIAS) unrelated to the voltage of a power supply and having a zero temperature coefficient, the bias current (IBIAS) is an input signal of the reference core unit (102), and the reference core unit (102) generates a pre-charging current on the basis of the input bias current (IBIAS) and implements overshoot-free fast start-up by means of employing pre-charging.

Abstract: A power measurement circuit, a chip and a communication terminal. The power measurement circuit comprises a power measurement unit (100), a reference current generation unit (200), a voltage-current conversion unit (300) and an operation output unit (400), wherein an output end of the power measurement unit (100) is connected to an input end of the voltage-current conversion unit (300), and an output end of the voltage-current conversion unit (300) and an output end of the reference current generation unit (200) are respectively connected to an input end of the operation output unit (400). By means of the circuit, during the process of a power measurement unit (100) converting, into a direct-current voltage, a received radio frequency signal to be measured, sensitivity adjustment is performed, such that the measurement sensitivity can be effectively adjusted.

Abstract: A power supply suppression circuit (10), a chip and a communication terminal that only achieve the enhancement of the power supply suppression capability from an AC, without generating additional circuit power consumption. The power supply suppression circuit (10) comprises a sampling unit (105), a compensation unit (106), and an amplification unit (107). The sampling unit (105) is connected to the compensation unit (106), and the compensation unit (106) is connected to the amplification unit (107). The power supply suppression circuit (10) obtains an AC signal from a preset sampling node position of a low dropout regulator, and generates an enhancement signal in phase with the AC signal on a power supply (Vdd) on the basis of the AC signal, such that the input end voltage of the power output stage of the low dropout regulator immediately follows the voltage change of the power supply (Vdd).

Abstract: An adaptive overshoot-voltage suppression circuit (100), a reference circuit, a chip and a communication terminal. The adaptive overshoot-voltage suppression circuit (100) comprises an overshoot-voltage suppression unit (1001) and a voltage-current conversion unit (1002), wherein an input end of the overshoot-voltage suppression unit (1001) is connected to a preset sampling point on a reference circuit to be tested, an output end of the overshoot-voltage suppression unit (1001) is connected to an input end of the voltage-current conversion unit (1002), and an output end of the voltage-current conversion unit (1002) is connected to a preset adjustment point on said reference circuit.

Abstract: A positive-and-negative-voltage charge pump circuit, comprising a clock generation module, a positive-voltage charge pump module, a transient enhancement module, and a negative-voltage charge pump module. The positive-voltage charge pump module generates a positive voltage according to a clock signal output by the clock generation module, and the transient enhancement module is used to sample the positive voltage and a power supply voltage, and convert same into currents for comparison, such that the negative-voltage charge pump module provides a switchable input voltage according to a comparison result. The negative-voltage charge pump module can quickly and reliably establish a negative voltage according to a clock signal output by the clock generation module, thereby improving the speed and efficiency of the negative-voltage charge pump module generating the negative voltage.

Abstract: Disclosed in the present invention are a chip port state detection circuit, a chip, and a communication terminal. The chip port state detection circuit, by means of a port detection conversion circuit, converts the state of a port to be detected into a corresponding voltage and respectively outputs same to a first comparator and a second comparator, which, after comparing same with a corresponding input reference voltage, output a logic signal to a chip ID determination circuit to obtain a chip ID corresponding to the state of the chip port to be detected, in order to distinguish multiple identical chips.

Abstract: Disclosed in the present invention are a low-temperature coefficient ring oscillator, a chip, and a communication terminal. The low-temperature coefficient ring oscillator comprises a temperature tracking compensation circuit, an inverter oscillation circuit, and a buffer shaping circuit. The temperature characteristics of the impedance of a PMOS tube and an NMOS tube in an inverter in the inverter oscillation circuit are tracked and compensated for by means of the impedance, along with temperature change, of a PMOS tube and a NMOS tube connected by a diode.

Abstract: Disclosed are an on-chip RC oscillator, a chip, and a communication terminal. The on-chip RC oscillator comprises a stabilized voltage supply module, an RC core oscillator module, a frequency sampling and conversion module, and a frequency trimming module. By means of the frequency sampling and conversion module, the clock frequency of the oscillator is sampled and detected in real time, and the sampled clock frequency is converted into a voltage signal, and then analog-to-digital conversion is performed to obtain a corresponding digital code, so that when the clock frequency changes, the frequency trimming module circuit converts said digital code into a control signal; a voltage having a suitable temperature coefficient is outputted for the RC core oscillator; also, a zero temperature coefficient current of a suitable magnitude is outputted for the RC core oscillator module, so as to precisely calibrate the clock frequency.