Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a silicon substrate, a transistor formed on the silicon substrate, a capacitor structure formed over the transistor, a metal interconnection for electrically connecting the capacitor structure to the transistor, a barrier layer formed on top of the metal interconnection and an inter-metal dielectric (IMD) layer formed on top of the barrier layer, wherein the barrier layer is made of a material such as Al2O3 or the like. The IMD layer is formed by using a plasma chemical vapor deposition (CVD) in a hydrogen rich atmosphere, wherein the barrier layer is used for preventing the capacitor structure from the hydrogen.

Abstract: A method for manufacturing an aluminum oxide film for use in a semiconductor device, the method including the steps of preparing a semiconductor substrate and setting the semiconductor substrate in a reaction chamber, supplying an aluminum source material and NH3 gas into the reaction chamber simultaneously for being absorbed on the semiconductor substrate, discharging unreacted MTMA or by-product by flowing nitrogen gas into the reaction chamber or vacuum purging, supplying an oxygen source material into the reaction chamber for being absorbed on the semiconductor substrate, and discharging unreacted oxygen source or by-product by flowing nitrogen gas into the reaction chamber or vacuum purging.

Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a silicon substrate, a transistor formed on the silicon substrate, a capacitor structure formed over the transistor, a metal interconnection for electrically connecting the capacitor structure to the transistor, a barrier layer formed on top of the metal interconnection and an inter-metal dielectric (IMD) layer formed on top of the barrier layer, wherein the barrier layer is made of a material such as A12O3 or the like. The IMD layer is formed by using a plasma chemical vapor deposition (CVD) in a hydrogen rich atmosphere, wherein the barrier layer is used for preventing the capacitor structure from the hydrogen.

Abstract: There is disclosed a method of manufacturing a capacitor in a semiconductor device. In order to solve the problems that it is difficult to secure an effective surface area and a misalignment between a capacitor plug and an underlying electrode occurs in a capacitor having a stack structure using a BST dielectric film, the present invention forms a contact layer and a diffusion prevention film within a first contact hole for plug in a plug shape, forms a second contact hole using an oxide film, deposits an underlying electrode material and then removes the oxide film to form an underlying electrode. Therefore, the present invention has outstanding advantages of increasing the effective surface area of an underlying electrode since a process of etching the underlying electrode which could not be etched easily can be omitted, and preventing diffusion of oxygen upon formation of a dielectric thin film since a direct contact of a metal/oxygen diffusion prevention film and the dielectric film can be avoided.

Abstract: A semiconductor device for use in a memory cell includes an active matrix provided with a semiconductor substrate, a transistor formed on the semiconductor substrate, an isolation region for isolating the transistor and an insulating layer formed on top of the transistor and the isolation region; and a capacitor structure, formed on top of the insulating layer, composed of a bottom electrode, a capacitor thin film placed on top of the bottom electrode and a top electrode formed on top of the capacitor thin film, wherein the capacitor thin film is made of Nb doped lead zirconate titanate (PNZT). In the device, the PNZT is formed by using a sol-gel coating solution is represented by a formula Pb(1−x/2)Pbx(Zr0.52Ti0.48)(1−x)O3, where x is equal to 0˜0.05 assuming that Nb compensates charges generated by Pb vacancies. The semiconductor device can lower leakage current approximately 2 order by adding Nb dopants to the PZT.

Abstract: A method for manufacturing a semiconductor device including steps of a) preparing an active matrix provided with at least one diffusion region and an insulating layer formed thereon; b) patterning the insulating layer into a predetermined configuration, thereby exposing the diffusion regions; c) forming metal silicide films on the exposed diffusion regions; d) forming a metal layer on the exposed diffusion regions and the insulating layer; e) patterning the metal layer to a preset configuration, thereby obtaining supporting members on the metal silicide films; f) forming bottom electrodes on the supporting members; and g) forming capacitor dielectrics and top electrodes on the bottom electrodes.

Abstract: A method for manufacturing a semiconductor device can form a thick lower electrode made of Pt. The method begins with the preparation of an active matrix provided with at least one diffusion region and an insulating layer formed thereon. Thereafter, the insulating layer is patterned into a predetermined configuration, thereby exposing the diffusion region and a metal silicide film is formed on the exposed diffusion region. And then, a barrier metal is formed on the metal silicide and a seed layer is formed on the active matrix including the barrier metal. In an ensuing step, a dummy oxide layer is formed on the seed layer and a dummy oxide layer is patterned into a preset configuration, thereby exposing portions of the seed layer which are located above the barrier metal. Next, the exposed portions of the seed layer are filled with a conductive material to a predetermined thickness.

Abstract: A method for manufacturing a semiconductor device including steps of a) preparing an active matrix provided with at least one diffusion region and an insulating layer formed thereon; b) patterning the insulating layer into a predetermined configuration, thereby exposing the diffusion regions; c) forming metal silicide films on the exposed diffusion regions; d) forming a metal layer on the exposed diffusion regions and the insulating layer; e) patterning the metal layer to a preset configuration, thereby obtaining supporting members on the metal silicide films; f) forming bottom electrodes on the supporting members; and g) forming capacitor dielectrics and top electrodes on the bottom electrodes.

Abstract: A metal organic chemical vapor deposition apparatus comprising a source ampule, a liquid micro-pump, a vaporizer equipped with a solvent supply means, and a reactor. A reactant dissolved in a solvent in the source ampule is transferred to the vaporizer by the liquid micro-pump. A sufficient amount of the solvent is additionally fed to the vaporizer by the solvent supply means, concurrently with the transfer, and vaporized along with the reactants. After being vaporized in the vaporizer, the reactant is injected to the reactor by carrier gas and deposited on a semiconductor substrate to form a high dielectric thin film. By virtue of the additional supplied solvent, the recondensation of the reactant in the vaporizer, which is attributed to the separation of the solvent from the reactant, can be prevented in the vaporizer and in the transfer line between the vaporizer and the reactor.

Abstract: A method for manufacturing an aluminum oxide film for use in a semiconductor device, the method including the steps of preparing a semiconductor substrate and setting the semiconductor substrate in a reaction chamber, supplying an aluminum source material and NH3 gas into the reaction chamber simultaneously for being absorbed on the semiconductor substrate, discharging unreacted MTMA or by-product by flowing nitrogen gas into the reaction chamber or vacuum purging, supplying an oxygen source material into the reaction chamber for being absorbed on the semiconductor substrate, and discharging unreacted oxygen source or by-product by flowing nitrogen gas into the reaction chamber or vacuum purging.

Abstract: A method for manufacturing a semiconductor device can form a thick lower electrode made of Pt. The method begins with the preparation of an active matrix provided with at least one diffusion region and an insulating layer formed thereon. Thereafter, the insulating layer is patterned into a predetermined configuration, thereby exposing the diffusion region and a metal silicide film is formed on the exposed diffusion region. And then, a barrier metal is formed on the metal silicide and a seed layer is formed on the active matrix including the barrier metal. In an ensuing step, a dummy oxide layer is formed on the seed layer and a dummy oxide layer is patterned into a preset configuration, thereby exposing portions of the seed layer which are located above the barrier metal. Next, the exposed portions of the seed layer are filled with a conductive material to a predetermined thickness.

Abstract: The present invention relates to a highly integrated memory device; and, more particularly, to a ferroelectric capacitor memory device capable of improving an electrical interconnection between a lower electrode and an active region of a cell transistor. In accordance with an aspect of the present invention, there is provided a method for fabricating a semiconductor capacitor, comprising the steps of: forming a lower electrode of the semiconductor capacitor; forming a ferroelectric film on the lower electrode, wherein the first ferroelectric film bears a volatile element; forming a capping oxide film on the ferroelectric film; applying a rapid thermal process to the ferroelectric film and the capping oxide film; and cooling the ferroelectric film, whereby a preferred orientation of atoms in the ferroelectric film and domain boundaries thereof are perpendicular to a semiconductor substrate for which the semiconductor capacitor is provided.

Abstract: A method for fabricating a ferroelectric memory device, comprising the steps of: providing a semiconductor substrate where a transistor having an impurity region is formed; forming a conduction layer for storage node over the substrate; forming a ferroelectric film on the conduction layer; patterning the conduction layer and the ferroelectric film to form a storage node and a dielectric film; forming a protection film for dielectric film over the semiconductor substrate to cover the storage node and the dielectric film; patterning the protection film to expose a selected portion of the dielectric film; and forming a plate node on the dielectric film.

Abstract: This invention relates to a method of manufacturing a capacitor in a semiconductor device. When forming a capacitor, just after forming the first ferroelectric PZT layer, supply of a DC bias voltage is maintained for a few minutes under the RF plasma before a cooling process, wherein then the cooling speed is rapidly increased so that a fine structure of the first PZT layer is transformed in the second PZT layer having a grain boundary of orientation polarization in the vertical direction and the domain structure. Just after forming the first ferroelectric PZT layer, after the RF plasma supply is shut off, an annealing process is performed for 5-20 minute at its temperature and then the cooling process is performed within 30 degree Celsius per minutes so that a fine structure of the first PZT layer is transformed to the second PZT layer having a grain boundary of orientation polarization in the vertical direction.

Abstract: Provided are methods for ferroelectric capacitors using a film of ruthenium dioxide as a bottom electrode. The method according to the invention includes the steps of: forming a first electrode of ruthenium dioxide over a lower layer including a conductive plug, the electrode being connected to the conductive plug; forming a film of strontium on the first electrode of ruthenium dioxide; forming a film of strontium ruthenium oxide by performing thermal treatment of the strontium film under oxygen atmosphere in order to prevent the diffusion of oxygen to the electrode of ruthenium dioxide; forming a thin film of crystallized ferroelectric material on the film of strontium ruthenium oxide; forming a second film of ruthenium dioxide on the ferroelectric film.

Abstract: A metal organic chemical vapor deposition apparatus comprising a source ampule, a liquid micro-pump, a vaporizer equipped with a solvent supply means, and a reactor. A reactant dissolved in a solvent in the source ampule is transferred to the vaporizer by the liquid micro-pump. A sufficient amount of the solvent is additionally fed to the vaporizer by the solvent supply means, concurrently with the transfer, and vaporized along with the reactants. After being vaporized in the vaporizer, the reactant is injected to the reactor by carrier gas and deposited on a semiconductor substrate to form a high dielectric thin film. By virtue of the additional supplied solvent, the recondensation of the reactant in the vaporizer, which is attributed to the separation of the solvent from the reactant, can be prevented in the vaporizer and in the transfer line between the vaporizer and the reactor.

Abstract: A method for fabricating a capacitor of a semiconductor device, which is capable improving the chemical and thermal stability of lower electrodes.