Abstract: According to an embodiment of the present disclosure, an exhaust gas treatment apparatus may include: a preprocessor configured to primarily remove harmful substances from exhaust gas produced by combustion; and a postprocessor configured to further remove harmful substances from preprocessed gas, which is the exhaust gas from which the harmful substances have been primarily removed by the preprocessor, wherein the postprocessor may include a postprocessor housing having a preprocessed gas inlet through which the preprocessed gas is introduced and a postprocessed gas outlet through which postprocessed gas from which harmful substances have been further removed by the postprocessor is discharged and forming a flow path of the preprocessed gas therein, and a diffuser disposed adjacent to the preprocessed gas inlet and configured to diffuse the preprocessed gas introduced through the preprocessed gas inlet.

Abstract: According to an embodiment of the present disclosure, an exhaust gas treatment apparatus may include: a preprocessor configured to primarily remove harmful substances from exhaust gas produced by combustion; and a postprocessor configured to further remove harmful substances from preprocessed gas, which is the exhaust gas from which the harmful substances have been primarily removed by the preprocessor, wherein the postprocessor may include a postprocessor housing having a preprocessed gas inlet through which the preprocessed gas is introduced and a postprocessed gas outlet through which postprocessed gas from which harmful substances have been further removed by the postprocessor is discharged and forming a flow path of the preprocessed gas therein, and a diffuser disposed adjacent to the preprocessed gas inlet and configured to diffuse the preprocessed gas introduced through the preprocessed gas inlet.

Abstract: An optical (disc) driving system including the DLL based multiphase clock generator circuit capable of generating 32 different phases from input clock having a frequency of 800 MHz or greater. The multiphase clock generator includes on a delay locked loop (DLL) having a frequency divider for outputting an N-divided clock to a first set of M voltage-controlled delay cells within a feedback loop, and further including an identical set of M voltage-controlled delay cells outside of the feedback loop for delaying the undivided clock and for outputting M multiphase clocks. An optical driver circuit of an optical driving system and a method for implementing a write-strategy for preventing “overlapping” of marks written on adjacent grooves on an optical disc. The circuit and method produce multiple write-strategy waveforms (channels) switching at a high resolution (e.g., T/32) in the Gigahertz frequency range.

Abstract: An optical (disc) driving system including the DLL based multiphase clock generator circuit capable of generating 32 different phases from input clock having a frequency of 800 MHz or greater. The multiphase clock generator includes on a delay locked loop (DLL) having a frequency divider for outputting an N-divided clock to a first set of M voltage-controlled delay cells within a feedback loop, and further including an identical set of M voltage-controlled delay cells outside of the feedback loop for delaying the undivided clock and for outputting M multiphase clocks. An optical driver circuit of an optical driving system and a method for implementing a write-strategy for preventing “overlapping” of marks written on adjacent grooves on an optical disc. The circuit and method produce multiple write-strategy waveforms (channels) switching at a high resolution (e.g., T/32) in the Gigahertz frequency range.

Abstract: A method and apparatus for dithering may provide filtering M bit data and performing a temporal/spatial compensation based on LSB of the filtered M bit data. The dithering may be performed on a selected frame. M-2 bits of the M bit data may be specified as a reference gray scale value resulting from the filtered M bit data. Temporal compensation may provide adding a weight of ‘0’ or ‘1’ to the reference gray scale value, for example M-2 bit data. Spatial compensation may include horizontal or vertical mirroring, and may be performed to represent whole gray scales without saturation.

Abstract: An optical transmission system for compensating for transmission loss includes a transmitting apparatus for serializing a plurality of n (n is a natural number)-bit channel data received from the outside in response to a predetermined clock signal, converting the serialized channel data and the predetermined clock signal into a current signal whose magnitude changes corresponding to an error detection signal, and outputting optical signals having optical output power corresponding to the magnitude of the current signal, a first optical fiber for transmitting the optical signals, a receiving apparatus for recovering the n-bit channel data and the predetermined clock signal from the optical signals received through the first optical fiber, detecting transmission loss generated when the optical signals are transmitted and received, optically converting the transmission loss, and outputting the optically converted transmission loss as the error detection signal, and a second optical fiber for transmitting the opt

Abstract: An LCD driving scaler capable of reducing electromagnetic interference employs a spread spectrum phase locked loop (PLL) in which a multi-phase voltage controlled oscillator oscillates and outputs a scaler pixel clock signal and a plurality of oscillation signals of different phases. A spread spectrum processor counts clock periods of a reference pixel clock signal when a horizontal synchronization signal having an adjusted frame rate is activated, and sequentially outputs the plurality of oscillation signals in response to a decoding signal. The plurality of oscillation signals are output to a main divider, which generates the main divider signal by dividing the frequencies of the plurality of oscillation signals. A main divider signal is input into a phase frequency detector, which detects a phase difference between the predivider signal and the main divider signal and outputs the phase difference signal so that the frequency of the scaler pixel clock signal repeatedly varies.

Abstract: In a video signal transmission system and method, a video signal and a pre-defined synchronization signal, generated according to the logic status of first control signals, are converted into first DC-balanced data and second DC-balanced data, respectively. The first data and second data are converted into a first serial data stream and a second serial data stream, respectively, and the data streams are transmitted over a first channel. Third data and fourth data are detected by correcting skew of the first serial data stream and the second serial data stream received through the first channel. The first data is encoded and transmitted so that the second data and the third data are not the same. The first serial data stream is transmitted over the first channel in response to an activated second control signal, while the second serial data stream is transmitted over the first channel in response to a deactivated second control signal.

Abstract: A data recovery circuit has a phase-locked loop for generating a plurality of clock signals; an oversampling unit for non-integer times oversampling serial data, and outputting the oversampled result as sample data formed of a plurality of bits; a pattern detector for receiving the sample data, and generating a pattern signal; a state accumulator for receiving the pattern signal, accumulating the frequency of occurrence of the pattern signal, and outputting the pattern signal having the highest frequency of occurrence as a state signal; a state selector for receiving the state signal, and generating a state selection signal for selecting bits at predetermined positions in the sample data; and a data selector for receiving the sample data, selecting bits of the sample data in response to the state selection signal, and outputting the selected bits as recovered data formed of a plurality of bits.

Abstract: An optical transmission system for compensating for transmission loss includes a transmitting apparatus for serializing a plurality of n (n is a natural number)-bit channel data received from the outside in response to a predetermined clock signal, converting the serialized channel data and the predetermined clock signal into a current signal whose magnitude changes corresponding to an error detection signal, and outputting optical signals having optical output power corresponding to the magnitude of the current signal, a first optical fiber for transmitting the optical signals, a receiving apparatus for recovering the n-bit channel data and the predetermined clock signal from the optical signals received through the first optical fiber, detecting transmission loss generated when the optical signals are transmitted and received, optically converting the transmission loss, and outputting the optically converted transmission loss as the error detection signal, and a second optical fiber for transmitting the opt

Abstract: An optical transmission system for compensating for transmission loss includes a transmitting apparatus for serializing a plurality of n (n is a natural number)-bit channel data received from the outside in response to a predetermined clock signal, converting the serialized channel data and the predetermined clock signal into a current signal whose magnitude changes corresponding to an error detection signal, and outputting optical signals having optical output power corresponding to the magnitude of the current signal, a first optical fiber for transmitting the optical signals, a receiving apparatus for recovering the n-bit channel data and the predetermined clock signal from the optical signals received through the first optical fiber, detecting transmission loss generated when the optical signals are transmitted and received, optically converting the transmission loss, and outputting the optically converted transmission loss as the error detection signal, and a second optical fiber for transmitting the opt

Abstract: A method and apparatus for dithering may provide filtering M bit data and performing a temporal/spatial compensation based on LSB of the filtered M bit data. The dithering may be performed on a selected frame. M-2 bits of the M bit data may be specified as a reference gray scale value resulting from the filtered M bit data. Temporal compensation may provide adding a weight of ‘0’ or ‘1’ to the reference gray scale value, for example M-2 bit data. Spatial compensation may include horizontal or vertical mirroring, and may be performed to represent whole gray scales without saturation.

Abstract: An optical receiver receives a current signal from an optical receiving diode which receives an optical signal, and converts the optical signal into the current signal. The optical receiver includes a current/voltage converter, a DC remover, an amplifier and a level converter implemented in a single chip. The current/voltage converter converts the current signal into a voltage signal and outputs the differential voltage signal as a conversion voltage signal. The DC remover removes DC components from the conversion voltage signal. The amplifier amplifies the output signal of the DC remover and then outputs the amplified output signal of the DC remover. The level converter converts the level of the output signal of the amplifier into a CMOS level and then outputs the output signal of the amplifier as data. The current/voltage converter has a single input structure in which a current signal is input into one input terminal.

Abstract: In a video signal transmission system and method, a video signal and a pre-defined synchronization signal, generated according to the logic status of first control signals, are converted into first DC-balanced data and second DC-balanced data, respectively. The first data and second data are converted into a first serial data stream and a second serial data stream, respectively, and the data streams are transmitted over a first channel. Third data and fourth data are detected by correcting skew of the first serial data stream and the second serial data stream received through the first channel. The first data is encoded and transmitted so that the second data and the third data are not the same. The first serial data stream is transmitted over the first channel in response to an activated second control signal, while the second serial data stream is transmitted over the first channel in response to a deactivated second control signal.

Abstract: A data recovery circuit and method for minimizing errors due to clock skew at a lower power are provided. The data recovery circuit includes a phase-locked loop, an oversampling unit, a pattern detector, a state selector, and a data selector.

Abstract: An optical receiver receives a current signal from an optical receiving diode which receives an optical signal, and converts the optical signal into the current signal. The optical receiver includes a current/voltage converter, a DC remover, an amplifier and a level converter implemented in a single chip. The current/voltage converter converts the current signal into a voltage signal and outputs the differential voltage signal as a conversion voltage signal. The DC remover removes DC components from the conversion voltage signal. The amplifier amplifies the output signal of the DC remover and then outputs the amplified output signal of the DC remover. The level converter converts the level of the output signal of the amplifier into a CMOS level and then outputs the output signal of the amplifier as data. The current/voltage converter has a single input structure in which a current signal is input into one input terminal.

Abstract: A data transmission method which maintains the direct current (DC) balancing of each channel and compensates for the skew between channels when digital video data made up of graphic data, control data and clock data is transmitted in series via channels allocated to the data, and a data receiving method, a data transmitter and a data receiver, are provided. In this method, the disparity representing the degree of the direct current (DC) balancing of the graphic data is calculated whenever the graphic data is transmitted. The calculated disparities are accumulated whenever the graphic data is transmitted. Scrambling is performed in which, when the accumulated disparity does not amount to the predetermined critical value, the received graphic data is transmitted without change, and when the accumulated disparity amounts to the predetermined critical value, the received graphic data is inverted.

Abstract: An optical transmission system for compensating for transmission loss includes a transmitting apparatus for serializing a plurality of n (n is a natural number)-bit channel data received from the outside in response to a predetermined clock signal, converting the serialized channel data and the predetermined clock signal into a current signal whose magnitude changes corresponding to an error detection signal, and outputting optical signals having optical output power corresponding to the magnitude of the current signal, a first optical fiber for transmitting the optical signals, a receiving apparatus for recovering the n-bit channel data and the predetermined clock signal from the optical signals received through the first optical fiber, detecting transmission loss generated when the optical signals are transmitted and received, optically converting the transmission loss, and outputting the optically converted transmission loss as the error detection signal, and a second optical fiber for transmitting the opt

Abstract: Cut-off control circuits implementing DC-coupling and AC-coupling to CRT cathodes can employ the same preamplifier integrated circuits with few additional components. The preamplifier includes a switching unit for receiving control data, generating a control signal according to control data, and outputting the control signal internally or externally. The switching unit provides a control signal internally to an amplification circuit, when the preamplifier operates in a cut-off control circuit having a DC-coupling to a CRT. With a DC coupling the amplification circuit controls a DC bias applied to a CRT cathode. The switching unit provides a bus control signal externally to a bias circuit, when the preamplifier operates in a cut-off control circuit having an AC-coupling to a CRT.

Abstract: The present invention relates to a horizontal focus controlling apparatus which compensates for a distortion generated on a screen of a computer or a TV set. The apparatus includes select signal generating means for dividing the period of a sawtooth signal into a falling portion, a rising portion located before the central point of the positive pulse of a flyback pulse signal, and a rising portion after the central point of the positive pulse of the flyback pulse signal and generating first, second, and third select signals synchronized with the respective portions and parabola signal generating means for generating a parabola signal which is synchronized with the flyback pulse signal by controlling the sawtooth signal according to the selections of the first, second, or third select signals.