Abstract: The present disclosure provides systems and methods for treating a virus disease in a subject in need thereof.

Abstract: The present invention relates to a frequency modulated continuous wave (FMCW) light detection and ranging (LiDAR) system with an integrated receiving optics for multiple channels, in which receiving optics are integrally configured and used for multiple channels, thereby simplifying assembly and manufacturing processes, infinitely expanding transmitting optics, improving angular resolution for vertical and horizontal fields of view, and preventing noise and performance degradation caused by crosstalk.

Abstract: Disclosed in the present invention is a camera module comprising: an optical output unit for outputting a first optical signal and a second optical signal to an object; a sensor for receiving a first reflected optical signal in which the first optical signal is reflected by the object; and a control unit for obtaining first distance information to the object by using the first optical signal and the first reflected optical signal, wherein an output of the first optical signal is smaller than an output of the second optical signal, and the control unit determines whether to output the second optical signal by using the first distance information.

Abstract: The present invention relates to a cooled charging cable for an electric vehicle, and the purpose of the present invention is to cool a power line by circulating, through a cooling tube or a refrigerant fluid channel, high-temperature heat generated in the power line when a large-capacity current required for rapid charging is continuously applied to the power line, and arrange the cooling tube or refrigerant fluid channel in a shaping material filled in the cable to cool the power line through a wider surface area in an indirect heat transfer method, so as to enhance the cooling efficiency while preventing the pipe or channel from being in direct contact with the power line, thereby preventing an insulation layer thereof from being deteriorated, damaged, or destructed due to the refrigerant.

Abstract: Disclosed in the present invention is a camera module comprising: an optical output unit for outputting a first optical signal and a second optical signal to an object; a sensor for receiving a first reflected optical signal in which the first optical signal is reflected by the object; and a control unit for obtaining first distance information to the object by using the first optical signal and the first reflected optical signal, wherein an output of the first optical signal is smaller than an output of the second optical signal, and the control unit determines whether to output the second optical signal by using the first distance information.

Abstract: Systems and methods for maintaining, optimizing, or strengthening an immune system of a subject are provided.

Abstract: Provided herein are methods for altering respiratory syncytial virus (RSV) replication in a cell using oligonucleotides derived from tRNAs, also referred to as tRFs (tRNA-derived RNA Fragments). The oligonucleotides may be used to decrease or increase replication of RSV. Also provided herein are methods for treating a subject having or at risk of having an RSV infection, and animal models for evaluating viral and host factors in RSV pathogenesis.

Abstract: Provided herein are methods for altering respiratory syncytial virus (RSV) replication in a cell using oligonucleotides derived from tRNAs, also referred to as tRFs (tRNA-derived RNA Fragments). The oligonucleotides may be used to decrease or increase replication of RSV. Also provided herein are methods for treating a subject having or at risk of having an RSV infection, and animal models for evaluating viral and host factors in RSV pathogenesis.

Abstract: The present invention relates to a peelable and water-crosslinked semiconductive resin composition. The peelable and water-crosslinked semiconductive resin composition includes 100 parts by weight of a basic resin; 20 to 80 parts by weight of carbon black based on weight of the basic resin; and 0.05 to 5.0 parts by weight of an amide-based lubricant based on weight of the basic resin, wherein the basic resin is a mixed resin including 60 to 80 weight % of an ethylene-based copolymer resin that is bonded with an unsaturated organic silane and has a melting point of 80° C. or above; 5 to 20 weight % of an ethylene-acrylic acid copolymer or its alkali metal salt; and 5 to 40 parts by weight of an ethylene propylene copolymer containing 5 to 20 weight % of ethylene, or a propylene rein.

Abstract: Example embodiments of the present invention relate to methods of manufacturing a semiconductor device. Other example embodiments of the present invention relate to methods of manufacturing a semiconductor device having a gate electrode. In the method of manufacturing the semiconductor device, a gate electrode may be formed on a semiconductor substrate. Damage in the semiconductor substrate and a sidewall of the gate electrode may be cured, or repaired, by a radical re-oxidation process to form an oxide layer on the semiconductor substrate and the gate electrode.

Abstract: A method of forming a floating gate of a non-volatile memory device can include etching a mask pattern formed between field isolation regions in a field isolation pattern on a substrate to recess a surface of the mask pattern below an upper surface of adjacent field isolation regions to form an opening having a width defined by a side wall of the adjacent field isolation regions above the surface. Then the adjacent field isolation regions is etched to increase the width of the opening.

Abstract: The present invention relates to a composition for manufacturing insulation materials of an electrical wire and an electrical wire manufactured using the same. The composition for manufacturing insulation materials of an electrical wire according to the present invention includes 100 parts by weight of a base resin, made by blending 20 to 70 weight % of any one resin of an unsaturated organosilane grafted polyethylene and an unsaturated organosilane grafted ethylene alpha olefine copolymer, and 30 to 80 weight % of an unsaturated organosilane grafted ethylene copolymer; 10 to 25 parts by weight of a brominated flame retardant; 10 to 50 parts by weight of an inorganic flame retardant; and 0.2 to 5 parts by weight of compound, as a crosslink retardant, represented as a general formula of XnSi(OR)4-n (X is a phenyl group, R is a methyl group and n is an integer of 1 to 3).

Abstract: A semiconductor device includes a substrate divided into a memory cell region and a logic region. A split gate electrode structure is formed in a memory cell region of a substrate. A silicon oxide layer is formed on a sidewall of the split gate electrode structure and a surface of the substrate. A word line is formed on the silicon oxide layer that is positioned on the sidewall of the split gate electrode structure. The word line has an upper width and a lower width. The lower width is greater than the upper width. A logic gate pattern is formed on a logic region of the substrate. The logic gate pattern has a thickness thinner than the lower width of the word line.

Abstract: A semiconductor device having reduced pitting may be formed from isolation layer patterns on a semiconductor substrate defining an active region, a tunnel oxide layer on the active region, the tunnel oxide layer having a nitrified surface, a floating gate on the tunnel oxide layer, a dielectric layer on the floating gate, and a control gate on the dielectric layer.

Abstract: A method of fabricating a flash memory cell having a split gate structure. A sacrificial layer is formed on a floating gate layer formed on a semiconductor substrate. The sacrificial layer is etched to form an opening exposing a portion of the floating gate layer. A gate interlayer insulating layer pattern is formed inside the opening. After removing the sacrificial layer pattern and etching the floating gate layer (using the gate interlayer insulating layer pattern as an etch mask), a floating gate is formed under the gate interlayer insulating layer pattern. A control gate is formed overlapping a portion of the floating gate.

Abstract: Example embodiments of the present invention relate to methods of manufacturing a semiconductor device. Other example embodiments of the present invention relate to methods of manufacturing a semiconductor device having a gate electrode. In the method of manufacturing the semiconductor device, a gate electrode may be formed on a semiconductor substrate. Damage in the semiconductor substrate and a sidewall of the gate electrode may be cured, or repaired, by a radical re-oxidation process to form an oxide layer on the semiconductor substrate and the gate electrode.

Abstract: There is provided a method of fabricating a split-gate flash memory cell using a spacer oxidation process. An oxidation barrier layer is formed on a floating gate layer, and an opening to expose a portion of the floating gate layer is formed in the oxidation barrier layer. Subsequently, a spacer is formed on a sidewall of the opening with a material layer having insulation property by oxidizing, and an inter-gate oxide layer pattern between a floating gate and a control gate is formed in the opening while the spacer is oxidized by performing an oxidation process.

Abstract: A method of forming a floating gate of a non-volatile memory device can include etching a mask pattern formed between field isolation regions in a field isolation pattern on a substrate to recess a surface of the mask pattern below an upper surface of adjacent field isolation regions to form an opening having a width defined by a side wall of the adjacent field isolation regions above the surface. Then the adjacent field isolation regions is etched to increase the width of the opening.

Abstract: A semiconductor device includes a substrate divided into a memory cell region and a logic region. A split gate electrode structure is formed in a memory cell region of a substrate. A silicon oxide layer is formed on a sidewall of the split gate electrode structure and a surface of the substrate. A word line is formed on the silicon oxide layer that is positioned on the sidewall of the split gate electrode structure. The word line has an upper width and a lower width. The lower width is greater than the upper width. A logic gate pattern is formed on a logic region of the substrate. The logic gate pattern has a thickness thinner than the lower width of the word line.

Abstract: A semiconductor device includes a substrate divided into a memory cell region and a logic region. A split gate electrode structure is formed in a memory cell region of a substrate. A silicon oxide layer is formed on a sidewall of the split gate electrode structure and a surface of the substrate. A word line is formed on the silicon oxide layer that is positioned on the sidewall of the split gate electrode structure. The word line has an upper width and a lower width. The lower width is greater than the upper width. A logic gate pattern is formed on a logic region of the substrate. The logic gate pattern has a thickness thinner than the lower width of the word line.