Abstract: An optical module includes a shell, a circuit board, a base, a laser assembly and a silicon optical chip. The circuit board is disposed between an upper shell and a lower shell of the shell. The base is located on the circuit board or in a through hole of the circuit board. The laser assembly and the silicon optical chip are located on the base. An upper box of the laser assembly and the base are combined to provide a cavity. Conductive substrates of the laser assembly are at least partially located in the cavity. Laser chips of the laser assembly are located on the conductive substrates. An opening of the cavity is located in an optical path where light emitted by the laser chips is emitted to the silicon optical chip, and a slot of the cavity allows the conductive substrates or wires to extend out of the cavity.

Abstract: An optical module includes a shell, a circuit board, a base, a laser assembly, a silicon optical chip and a protective cover. The laser assembly and the silicon optical chip are located on the base. The protective cover covers on the circuit board. The laser assembly and a wiring region of the laser assembly and/or the silicon optical chip and a wiring region of the silicon optical chip are encapsulated between the protective cover and the circuit board. The shell includes at least one heat conduction column, the at least one heat conduction column is disposed on an inner wall of the shell and is in thermal conductive connection with the laser assembly and/or the silicon optical chip. The protective cover includes at least one escape opening that allow the at least one heat conduction column to pass and enter an inside of the protective cover.

Abstract: A method, a device, and a computer-readable storage medium for managing processes are disclosed. The method includes (i) determining a trigger frequency at which a process is activated due to receipt of data within a preset duration, (ii) adjusting a current trust value corresponding to the process based on the trigger frequency, wherein the current trust value is used to indicate the degree of trustworthiness when the process is currently in the normal state, and (iii) managing the state of the process based on the adjusted result of the trust value.

Abstract: A compiler system for deploying CNN models to FPGA-based high-performance accelerators is provided. The compiler system comprises a compiler front end and a compiler back end, as well as a runtime library and an accelerator; the compiler front end is used for the quantization of CNN models to be deployed based on the ONNX model and a training data set, and the IR Graph corresponding to the CNN model to be deployed is obtained; the compiler back end is used to determine instructions and configuration information; the instruction set architecture comprises CONY, MAXP, AVGP, ADD and FC, and the configuration information comprises pre-trained weights and bias, packet descriptors and key-value pairs representing control registers; the runtime library is used to store instructions and configuration files to DRAM, and FPGA is configured according to the configuration information of the model.