Abstract: A semiconductor device includes a substrate including PMOSFET and NMOSFET regions; and first/second transistors on the PMOSFET/NMOSFET regions, respectively, wherein the first transistor includes a first gate dielectric layer on the substrate; a first lower metal pattern on the first gate dielectric layer; a second lower metal pattern on the first lower metal pattern; and a first intermediate pattern between the first and second lower metal patterns, the second transistor includes a second gate dielectric layer on the substrate; a third lower metal pattern on the second gate dielectric layer; and a second intermediate pattern between the second gate dielectric layer and the third lower metal pattern, the first and second intermediate patterns each include lanthanum, the first to third lower metal patterns each include a metal nitride, and a thickness of the first lower metal pattern is greater than a thickness of the third lower metal pattern.