Patents by Inventor Yool Kang

Yool Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260086456
    Abstract: The inventive concept relates to a method of manufacturing an organometallic oxide cluster, a photoresist composition including the organometallic oxide cluster, and a method of manufacturing a semiconductor device using the photoresist composition, and more particularly, to a method of manufacturing an organometallic oxide cluster including a carbonyl group, a photoresist composition including the organometallic oxide cluster, and a method of manufacturing a semiconductor device using the photoresist composition.
    Type: Application
    Filed: April 30, 2025
    Publication date: March 26, 2026
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SOGANG UNIVERSITY RESEARCH & BUSINESS DEVELOPMENT FOUNDATION
    Inventors: Yool Kang, Bongjin Moon, Ahram Suh, Woojung Kim, Taeyoon Park, Hanbee Kim, Kwanheum Lee
  • Publication number: 20260003279
    Abstract: A photoresist composition may include an organometallic oxide cluster and a solvent. The organometallic oxide cluster may include a first repeating unit represented by General Formula 1 and a second repeating unit represented by General Formula 2. In General Formulae 1 and 2, R11, R12, and M may be the same as defined in the detailed description, and * may represent a binding site.
    Type: Application
    Filed: January 3, 2025
    Publication date: January 1, 2026
    Applicants: Samsung Electronics Co., Ltd., SOGANG UNIVERSITY RESEARCH FOUNDATION
    Inventors: Ahram SUH, Bongjin MOON, Yool KANG, Woojung KIM, Taeyoon PARK, Hanbee KIM, Jaeseung ROH, Sangwon EOM, Kwanheum LEE
  • Publication number: 20240319593
    Abstract: Provided are a thinner composition, which may be generally used for an extreme ultraviolet (EUV) photoresist as well as KrF and ArF photoresists and exhibits improved performance in reduced resist coating (RRC) and edge bead removal (EBR), and which has an excellent pipe cleaning capability, and a method of treating a substrate surface by using the thinner composition. The thinner composition includes a C2-C4 alkylene glycol C1-C4 alkyl ether acetate, a C2-C3 alkylene glycol C1-C4 alkyl ether, and a cycloketone.
    Type: Application
    Filed: October 18, 2023
    Publication date: September 26, 2024
    Applicants: Samsung Electronics Co., Ltd., Dongjin Semichem Co., Ltd.
    Inventors: Yool Kang, Taehui Kwon, Dongjun Kim, Ahram Suh, Miyeon Jung, Samjong Choi, Ohhwan Kweon, Minki Kim, Jaehyun Kim, Sunggun Shin, Seungryul Yoo, Heekyung Lee
  • Patent number: 11189491
    Abstract: A method of forming a mask pattern and a method of fabricating a semiconductor device, the method of forming a mask pattern including providing a substrate including a plurality of patterns thereon; forming a mask material solution layer such that the mask material solution layer covers the patterns on the substrate; and applying a liquid material to remove an upper portion of the mask material solution layer, wherein the mask material solution layer includes a fluorine additive concentrated at the upper portion of the mask material solution layer.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: November 30, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chul-Ho Kim, Yool Kang, Jaesung Kang, Jinphil Choi
  • Publication number: 20200234947
    Abstract: A method of forming a mask pattern and a method of fabricating a semiconductor device, the method of forming a mask pattern including providing a substrate including a plurality of patterns thereon; forming a mask material solution layer such that the mask material solution layer covers the patterns on the substrate; and applying a liquid material to remove an upper portion of the mask material solution layer, wherein the mask material solution layer includes a fluorine additive concentrated at the upper portion of the mask material solution layer.
    Type: Application
    Filed: January 3, 2020
    Publication date: July 23, 2020
    Inventors: Chul-Ho KIM, Yool KANG, Jaesung KANG, Jinphil CHOI
  • Patent number: 10712662
    Abstract: A method of forming a pattern is disclosed. The method includes preparing a composition that includes a solvent and a polymer including a repeating unit in which at least one isocyanurate unit having a first structure is connected to another isocyanurate unit having a second structure different from the first structure; applying the composition on a substrate to form an underlayer; forming a photoresist layer on the underlayer; etching the photoresist layer to form a photoresist pattern; and patterning the substrate using the photoresist pattern.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: July 14, 2020
    Assignees: SAMSUNG ELECTRONICS CO., LTD., DONGJIN SEMICHEM CO., LTD.
    Inventors: Jin-A Ryu, Jung-Youl Lee, Kyung-Lyul Moon, Yool Kang, Hyun-Jin Kim, Yu-Jin Jeoung, Man-Ho Han
  • Patent number: 10236185
    Abstract: A method of forming patterns for a semiconductor device includes preparing a hardmask composition including a carbon allotrope, a spin-on hardmask (SOH) material, an aromatic ring-containing polymer, and a solvent, applying the hardmask composition to an etching target layer, forming a hardmask by heat-treating the applied hardmask composition, forming a photoresist pattern on the hardmask, forming a hardmask pattern by etching the hardmask using the photoresist pattern as an etching mask, and forming an etched pattern by etching the etching target layer using the hardmask pattern as an etching mask.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: March 19, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yool Kang, Kyoung-sil Park, Yun-seok Choi, Boo-deuk Kim, Ye-hwan Kim
  • Publication number: 20180151362
    Abstract: A method of forming patterns for a semiconductor device includes preparing a hardmask composition including a carbon allotrope, a spin-on hardmask (SOH) material, an aromatic ring-containing polymer, and a solvent, applying the hardmask composition to an etching target layer, forming a hardmask by heat-treating the applied hardmask composition, forming a photoresist pattern on the hardmask, forming a hardmask pattern by etching the hardmask using the photoresist pattern as an etching mask, and forming an etched pattern by etching the etching target layer using the hardmask pattern as an etching mask.
    Type: Application
    Filed: August 25, 2017
    Publication date: May 31, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yool KANG, Kyoung-sil Park, Yun-seok Choi, Boo-deuk Kim, Ye-hwan Kim
  • Patent number: 9892915
    Abstract: A manufacturing method of a semiconductor device includes forming a hard mask layer on a semiconductor substrate using a hard mask composition. Hard mask patterns are formed by patterning the hard mask layer. Semiconductor patterns are formed by etching the semiconductor substrate using the hard mask patterns. The hard mask composition includes a plurality of first carbon nanotubes (CNTs) having a first length, a plurality of second CNTs having a second length, which is at least 3 times the first length, and a dispersing agent in which the first CNTs and the second CNTs are dispersed. The total mass of the first CNTs is 1 to 2.5 times the total mass of the second CNTs.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: February 13, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung Yun Yang, Seung Hyun Lee, Kyoung Sil Park, Yool Kang, Yi Seul Kim, Yun Seok Choi
  • Publication number: 20170199459
    Abstract: A method of forming a pattern is disclosed. The method includes preparing a composition that includes a solvent and a polymer including a repeating unit in which at least one isocyanurate unit having a first structure is connected to another isocyanurate unit having a second structure different from the first structure; applying the composition on a substrate to form an underlayer; forming a photoresist layer on the underlayer; etching the photoresist layer to form a photoresist pattern; and patterning the substrate using the photoresist pattern.
    Type: Application
    Filed: January 13, 2017
    Publication date: July 13, 2017
    Inventors: Jin-A RYU, Jung-Youl LEE, Kyung-Lyul MOON, Yool KANG, Hyun-Jin KIM, Yu-Jin JEOUNG, Man-Ho HAN
  • Publication number: 20170186602
    Abstract: A manufacturing method of a semiconductor device includes forming a hard mask layer on a semiconductor substrate using a hard mask composition. Hard mask patterns are formed by patterning the hard mask layer. Semiconductor patterns are formed by etching the semiconductor substrate using the hard mask patterns. The hard mask composition includes a plurality of first carbon nanotubes (CNTs) having a first length, a plurality of second CNTs having a second length, which is at least 3 times the first length, and a dispersing agent in which the first CNTs and the second CNTs are dispersed. The total mass of the first CNTs is 1 to 2.5 times the total mass of the second CNTs.
    Type: Application
    Filed: October 5, 2016
    Publication date: June 29, 2017
    Applicant: PUSAN NATIONAL UNIVERSITY INDUSTRY-UNIVERSITY COOPERATION FOUNDATION
    Inventors: Seung Yun YANG, Seung Hyun LEE, Kyoung Sil PARK, Yool KANG, Yi Seul KIM, Yun Seok CHOI
  • Patent number: 9613821
    Abstract: Provided are a method of forming patterns and a method of manufacturing an integrated circuit device. In the method of forming patterns, a photoresist pattern having a first opening exposing a first region of a target layer is formed. A capping layer is formed at sidewalls of the photoresist pattern defining the first opening. An insoluble region is formed around the first opening by diffusing acid from the capping layer to the inside of the photoresist pattern. A second opening exposing a second region of the target layer is formed by removing a soluble region spaced apart from the first opening, with the insoluble region being interposed therebetween. The target layer is etched using the insoluble region as an etch mask.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: April 4, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yool Kang, Dong-won Kim, Ju-young Kim, Tae-hoon Kim, Hye-ji Kim, Su-min Park, Hyung-rae Lee
  • Patent number: 9337032
    Abstract: A method of forming a pattern of a semiconductor device includes providing a substrate, forming a photoresist layer by coating a resist composition including an acid generator and a first resin, the first resin having an acid-labile group, exposing the photoresist layer, forming a photoresist pattern by negatively developing the photoresist layer using a developing solution including an organic solvent, coating a capping composition including a second resin and the organic solvent on the substrate having the photoresist pattern formed thereon, and attaching a capping layer on upper and side surfaces of the photoresist pattern, by baking the capping composition and developing the capping composition using the developing solution including the organic solvent.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: May 10, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Rae Lee, Yool Kang, Seong-Ji Kwon
  • Publication number: 20150364334
    Abstract: Provided are a method of forming patterns and a method of manufacturing an integrated circuit device. In the method of forming patterns, a photoresist pattern having a first opening exposing a first region of a target layer is formed. A capping layer is formed at sidewalls of the photoresist pattern defining the first opening. An insoluble region is formed around the first opening by diffusing acid from the capping layer to the inside of the photoresist pattern. A second opening exposing a second region of the target layer is formed by removing a soluble region spaced apart from the first opening, with the insoluble region being interposed therebetween. The target layer is etched using the insoluble region as an etch mask.
    Type: Application
    Filed: April 24, 2015
    Publication date: December 17, 2015
    Inventors: Yool Kang, Dong-won Kim, Ju-young Kim, Tae-hoon Kim, Hye-ji Lee, Su-min Park, Hyung-rae Lee
  • Publication number: 20150118852
    Abstract: A method of forming a pattern of a semiconductor device includes providing a substrate, forming a photoresist layer by coating a resist composition including an acid generator and a first resin, the first resin having an acid-labile group, exposing the photoresist layer, forming a photoresist pattern by negatively developing the photoresist layer using a developing solution including an organic solvent, coating a capping composition including a second resin and the organic solvent on the substrate having the photoresist pattern formed thereon, and attaching a capping layer on upper and side surfaces of the photoresist pattern, by baking the capping composition and developing the capping composition using the developing solution including the organic solvent.
    Type: Application
    Filed: July 29, 2014
    Publication date: April 30, 2015
    Inventors: Hyung-Rae LEE, Yool KANG, Seong-Ji KWON
  • Patent number: 8987118
    Abstract: A method of fabricating a semiconductor device is disclosed comprising the steps of: providing a substrate having a first region, a second region and a plurality of gate electrodes which are formed on the first and second regions of the substrate; forming a mask film to expose the first region of the substrate while covering the second region of the substrate, such that the mask film has a negative lateral profile at a boundary between the first and second regions of the substrate; forming sigma trenches in the first region of the substrate by etching the first region of the substrate using the mask film and the gate electrodes as a mask; and forming an epitaxial layer in each of the sigma trenches.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Rae Lee, Keita Kato, Atsushi Nakamura, Yool Kang, Suk-Koo Hong, Jae-Ho Kim, Dong-Jun Lee, Si-Young Lee
  • Patent number: 8778598
    Abstract: A method of forming fine patterns of a semiconductor device according to a double patterning process that uses acid diffusion is provided. In this method, a plurality of first mask patterns are formed on a substrate. A capping film including an acid source is formed on the exposed surface areas of the plurality of first mask patterns. A second mask layer is formed on the capping films. A plurality of acid diffused regions are formed within the second mask layer by diffusing acid obtained from the acid source from the capping films into the second mask layer. A plurality of second mask patterns are formed of residual parts of the second mask layer which remain after removing the acid diffused regions of the second mask layer.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: July 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yool Kang, Suk-joo Lee, Jung-hyeon Lee, Shi-yong Yi
  • Patent number: 8735053
    Abstract: Methods of forming photoresist patterns may include forming a photoresist layer on a substrate, exposing the photoresist layer using an exposure mask, forming a preliminary pattern by developing the exposed photoresist layer and treating a surface of the preliminary pattern using a treatment agent that includes a coating polymer.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: May 27, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Subramanya Mayya, Takahiro Yasue, Seok-hwan Oh, Yool Kang
  • Publication number: 20140124834
    Abstract: A method of fabricating a semiconductor device is disclosed comprising the steps of: providing a substrate having a first region, a second region and a plurality of gate electrodes which are formed on the first and second regions of the substrate; forming a mask film to expose the first region of the substrate while covering the second region of the substrate, such that the mask film has a negative lateral profile at a boundary between the first and second regions of the substrate; forming sigma trenches in the first region of the substrate by etching the first region of the substrate using the mask film and the gate electrodes as a mask; and forming an epitaxial layer in each of the sigma trenches.
    Type: Application
    Filed: September 4, 2013
    Publication date: May 8, 2014
    Applicants: FUJIFILM CORPORATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-Rae Lee, Keita Kato, Atsushi Nakamura, Yool Kang, Suk-Koo Hong, Jae-Ho Kim, Dong-Jun Lee, Si-Young Lee
  • Patent number: 8623739
    Abstract: A method of manufacturing a semiconductor device includes forming a resist pattern on a first region on a substrate, bringing a descum solution including an acid source into contact with the resist pattern and with a second region of the substrate, decomposing resist residues remaining on the second region of the substrate by using acid obtained from the acid source in the descum solution and removing the decomposed resist residues and the descum solution from the substrate.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: January 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-rae Lee, Yool Kang, Kyung-hwan Yoon, Hyoung-hee Kim, So-ra Han, Tae-hoi Park