Patents by Inventor Yoon Cheol Bae

Yoon Cheol Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250218510
    Abstract: A semiconductor device may include a memory cell array including a plurality of memory cells arranged at locations where a plurality of word lines intersect with a plurality of bit lines, a row decoder configured to drive the plurality of word lines and a column decoder configured to drive the plurality of bit lines, wherein each of the plurality of memory cells has a set state or a reset state according to a normal write operation performed thereon, the plurality of memory cells include first memory cells in a specific area of the memory cell array, and the row decoder and the column decoder control a bit line and a word line coupled to a corresponding one of the first memory cells to increase a margin between the set state and the reset state of the corresponding first memory cell.
    Type: Application
    Filed: April 30, 2024
    Publication date: July 3, 2025
    Inventors: Gap Sok DO, Yoon Cheol BAE
  • Patent number: 8749023
    Abstract: Disclosed are a ReRAM, which is a non-volatile memory device, and a production method therefor. A resistance-variable layer, which varies the resistance in accordance with an applied pulse, has a multilayered structure comprising 3 oxide films. Each oxide film consists of an oxide film of the same type as the neighbouring oxide film(s), but the oxygen ratios in the compositions of neighbouring oxide films differ from each other.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: June 10, 2014
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jin Pyo Hong, Young Ho Do, June-Sik Kwak, Yoon Cheol Bae
  • Publication number: 20130214235
    Abstract: Disclosed is a resistive memory simultaneously having rectifying characteristics and resistive characteristics according to a bias direction, wherein a resistive diode is interposed between electrodes at the top and bottom thereof. The resistive diode has a form in which a p-type resistive semiconductor layer is bonded to an n-type resistive semiconductor layer. When a high reverse bias is applied to the resistive diode, the resistive diode forms a conductive filament. When a forward bias is applied thereafter, a reset that destroys a portion of the formed conductive filament occurs, and as a result, a high resistance state is formed. Additionally, when a reverse bias is applied again, a set operation regenerating a conductive filament occurs. Thus, a low resistance state is achieved. Moreover, in order to achieve a resistive semiconductor layer and ohmic contact, and suppress the formation of a Schottky barrier, an ohmic contact layer is formed on the resistive diode.
    Type: Application
    Filed: October 25, 2011
    Publication date: August 22, 2013
    Applicant: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
    Inventors: Jin Pyo Hong, Yoon Cheol Bae, June Sik Kwak, An Rahm Lee
  • Publication number: 20120049147
    Abstract: Disclosed are a ReRAM, which is a non-volatile memory device, and a production method therefor. A resistance-variable layer, which varies the resistance in accordance with an applied pulse, has a multilayered structure comprising 3 oxide films. Each oxide film consists of an oxide film of the same type as the neighbouring oxide film(s), but the oxygen ratios in the compositions of neighbouring oxide films differ from each other.
    Type: Application
    Filed: April 8, 2010
    Publication date: March 1, 2012
    Inventors: Jin Pyo Hong, Young Ho Do, June-Sik Kwak, Yoon Cheol Bae