Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.

Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.

Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.

Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.

Abstract: The present invention provides a method for forming a metal silicide layer in an active area of the semiconductor device. The method for forming the metal silicide layer includes: forming a source/drain junction area on a silicon substrate; forming an attack protection layer on the source/drain junction area, wherein the attack protection layer is electrically conductive and prevents a silicon substrate attack caused by chlorine (Cl) gas; forming a titanium (Ti) layer over the attack protection layer through a low pressure chemical vapor deposition (LPCVD) process using a source gas of TiCl4; and diffusing the Ti layer into the attack protection layer to thereby form a metal silicide layer.

Abstract: A semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. The titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer. An epitaxially grown titanium silicide layer having a phase of C49 and is formed on the exposed silicon substrate disposed within the contact hole; and a metal layer is formed on an upper surface of the titanium silicide layer.

Abstract: A method for fabricating cell plugs of a semiconductor device with cell plugs is disclosed, which increases the operation speed of the semiconductor device by reducing the cell plug resistance of the device. The semiconductor device includes a first insulating interlayer on a semiconductor substrate; a first cell plug on the semiconductor substrate through the first insulating interlayer; a second insulating interlayer on the first insulating interlayer; a silicide contact on a predetermined surface of the first cell plug through the first insulating interlayer; and a second cell plug on the silicide contact through the second insulating interlayer.

Abstract: A semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. The titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer. An epitaxially grown titanium silicide layer having a phase of C49 and is formed on the exposed silicon substrate disposed within the contact hole; and a metal layer is formed on an upper surface of the titanium silicide layer.

Abstract: The present invention is related to a method for forming a titanium silicide contact in a semiconductor device capable of minimizing consumptions of a silicon substrate and performing a low-temperature deposition through the use of an atomic layer deposition technique. The method includes the steps of: forming an inter-layer insulation layer on a silicon substrate; forming a contact hole exposing a portion of the silicon substrate by selectively etching the inter-layer insulation layer; forming a titanium silicide layer on the exposed portion of the silicon substrate by employing an atomic layer deposition technique using a source gas of titanium tetrachloride and a silicon-containing gas; forming a metal barrier layer on the resulting structure; and forming a contact plug by filling a conductive material into the contact hole and planarizing the deposited conductive material.

Abstract: The present invention provides a method for forming a metal silicide layer in an active area of the semiconductor device. The method for forming the metal silicide layer includes: forming a source/drain junction area on a silicon substrate; forming an attack protection layer on the source/drain junction area, wherein the attack protection layer is electrically conductive and prevents a silicon substrate attack caused by chlorine (Cl) gas; forming a titanium (Ti) layer over the attack protection layer through a low pressure chemical vapor deposition (LPCVD) process using a source gas of TiCl4; and diffusing the Ti layer into the attack protection layer to thereby form a metal silicide layer.

Abstract: A method for fabricating cell plugs of a semiconductor device with cell plugs is disclosed, which increases the operation speed of the semiconductor device by reducing the cell plug resistance of the device. The semiconductor device includes a first insulating interlayer on a semiconductor substrate; a first cell plug on the semiconductor substrate through the first insulating interlayer; a second insulating interlayer on the first insulating interlayer; a silicide contact on a predetermined surface of the first cell plug through the first insulating interlayer; and a second cell plug on the silicide contact through the second insulating interlayer.

Abstract: A method for fabricating cell plugs of a semiconductor device is disclosed, which increases the operation speed of the semiconductor device by reducing the cell plug resistance of the device. The method includes the steps of forming a first insulating interlayer on a semiconductor substrate, forming a first cell plug on the semiconductor substrate through the first insulating interlayer, forming a second insulating interlayer on the semiconductor substrate, forming a silicide contact on a predetermined surface of the first cell plug through the first insulating interlayer, and forming a second cell plug on the silicide contact through the second insulating interlayer.

Abstract: A method for fabricating cell plugs of a semiconductor device is disclosed, which increases the operation speed of the semiconductor device by reducing the cell plug resistance of the device. The method includes the steps of forming a first insulating interlayer on a semiconductor substrate, forming a first cell plug on the semiconductor substrate through the first insulating interlayer, forming a second insulating interlayer on the semiconductor substrate, forming a silicide contact on a predetermined surface of the first cell plug through the first insulating interlayer, and forming a second cell plug on the silicide contact through the second insulating interlayer.

Abstract: A method for fabricating a titanium silicide film in which when a titanium silicide film is fabricated by using a Chemical Vapor Deposition, an NH3-gas plasma process or an N2-gas plasma process is conducted for several times to minimize etching of the silicon substrate and consumption of a dopant of an impurity layer, thereby restraining a leakage current from increasing. The method for fabricating a titanium silicide film includes the steps of: (a) depositing a titanium silicide film as thick as {fraction (1/n)} of a total desired thickness on a silicon substrate by using the Chemical Vapor Deposition method; (b) processing the titanium silicide film with a nitrogen-gas plasma or ammonia-gas plasma; and (c) repeatedly performing step (a) and step (b) n times.

Abstract: A method for fabricating a titanium silicide film in which when a titanium silicide film is fabricated by using a Chemical Vapor Deposition, an NH3-gas plasma process or an N2-gas plasma process is conducted for several times to minimize etching of the silicon substrate and consumption of a dopant of an impurity layer, thereby restraining a leakage current from increasing. The method for fabricating a titanium silicide film includes the steps of: (a) depositing a titanium silicide film as thick as {fraction (1/n)} of a total desired thickness on a silicon substrate by using the Chemical Vapor Deposition method; (b) processing the titanium silicide film with a nitrogen-gas plasma or ammonia-gas plasma; and (c) repeatedly performing step (a) and step (b) n times.