Patents by Inventor Yoon-Soo Jang
Yoon-Soo Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12174016Abstract: Systems and methods for soliton microcomb-based precision dimensional metrology via spectrally-resolved interferometry are described. In an embodiment, the system includes a dual-pumped soliton microcomb generator comprising a pump, a microresonator, and an auxiliary pump and that generates a single-soliton microcomb, an erbium-doped fiber amplifier that amplifies a C-band section of the soliton microcomb and a non-polarizing beam splitter that divides the soliton microcomb pulses into a reference arm pulse and a measurement arm pulse for an interferometer and recombines the reference arm pulse and the measurement arm pulse into a recombined beam upon their return.Type: GrantFiled: November 6, 2019Date of Patent: December 24, 2024Assignee: The Regents of the University of CaliforniaInventors: Yoon-Soo Jang, Chee Wei Wong, Hao Liu, Jinghui Yang
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Publication number: 20210381819Abstract: Systems and methods for soliton microcomb-based precision dimensional metrology via spectrally-resolved interferometry are described. In an embodiment, the system includes a dual-pumped soliton microcomb generator comprising a pump, a microresonator, and an auxiliary pump and that generates a single-soliton microcomb, an erbium-doped fiber amplifier that amplifies a C-band section of the soliton microcomb and a non-polarizing beam splitter that divides the soliton microcomb pulses into a reference arm pulse and a measurement arm pulse for an interferometer and recombines the reference arm pulse and the measurement arm pulse into a recombined beam upon their return.Type: ApplicationFiled: November 6, 2019Publication date: December 9, 2021Applicant: The Regents of the University of CaliforniaInventors: Yoon-Soo Jang, Chee Wei Wong, Hao Liu, Jinghui Yang
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Patent number: 10759369Abstract: A method of controlling an active seatbelt includes checking whether a seatbelt is fastened, collecting driving information from a sensor or driving assist/safety system installed in a vehicle, determining a safety state of the vehicle based on the driving information, checking whether an airbag is deployed, and outputting a motor control signal for restraint control of the seatbelt in response to the safety state when the airbag is not deployed.Type: GrantFiled: August 20, 2018Date of Patent: September 1, 2020Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATIONInventor: Yoon Soo Jang
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Publication number: 20190184926Abstract: A method of controlling an active seatbelt includes checking whether a seatbelt is fastened, collecting driving information from a sensor or driving assist/safety system installed in a vehicle, determining a safety state of the vehicle based on the driving information, checking whether an airbag is deployed, and outputting a motor control signal for restraint control of the seatbelt in response to the safety state when the airbag is not deployed.Type: ApplicationFiled: August 20, 2018Publication date: June 20, 2019Inventor: Yoon Soo JANG
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Publication number: 20190176736Abstract: An active seat belt control apparatus is controlled according to a state of a vehicle. A control method for the active seat belt control apparatus includes: collecting, by a communication unit, state information about the vehicle; determining, by a controller, whether to activate a pulling operation of a seat belt using the collected state information; and activating the pulling operation of the seat belt using a motor.Type: ApplicationFiled: April 16, 2018Publication date: June 13, 2019Inventor: Yoon Soo Jang
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Patent number: 9564230Abstract: A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array configured to include memory cells, a peripheral circuit configured to perform an erase operation and a soft program operation and a control circuit configured to control the peripheral circuit so that the memory cells are programmed though a hot carrier injection HCI method when the soft program operation is performed.Type: GrantFiled: April 10, 2015Date of Patent: February 7, 2017Assignee: SK hynix Inc.Inventor: Yoon Soo Jang
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Patent number: 9418748Abstract: A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array including memory blocks, a voltage generator configured to generate a precharge voltage; and a read and write circuit coupled to the memory blocks through bit lines, and configured to supply the precharge voltage to the bit lines when a selected memory block is accessed. Here, the precharge voltage varies depending on a distance between the read and write circuit and the selected memory block.Type: GrantFiled: September 2, 2015Date of Patent: August 16, 2016Assignee: SK HYNIX INC.Inventors: Jun Hyuk Lee, Eun Joung Lee, Yoon Soo Jang, Seung Won Kim
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Patent number: 9349465Abstract: A semiconductor memory device and a method of operating the same are provided. The semiconductor memory device includes memory cells stacked on a substrate. The method includes applying a reference voltage to an unselected drain select line, applying a drain selection voltage to a selected drain select line, and applying a word line voltage to a normal word line. Before the word line voltage is applied to the normal word line, a positive voltage is applied to a dummy word line to bounce the unselected drain select line.Type: GrantFiled: January 14, 2014Date of Patent: May 24, 2016Assignee: SK HYNIX INC.Inventor: Yoon Soo Jang
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Publication number: 20150371713Abstract: A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array including memory blocks, a voltage generator configured to generate a precharge voltage; and a read and write circuit coupled to the memory blocks through bit lines, and configured to supply the precharge voltage to the bit lines when a selected memory block is accessed. Here, the precharge voltage varies depending on a distance between the read and write circuit and the selected memory block.Type: ApplicationFiled: September 2, 2015Publication date: December 24, 2015Inventors: Jun Hyuk LEE, Eun Joung LEE, Yoon Soo JANG, Seung Won KIM
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Patent number: 9159433Abstract: A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array including memory blocks, a voltage generator configured to generate a precharge voltage; and a read and write circuit coupled to the memory blocks through bit lines, and configured to supply the precharge voltage to the bit lines when a selected memory block is accessed. Here, the precharge voltage varies depending on a distance between the read and write circuit and the selected memory block.Type: GrantFiled: March 14, 2013Date of Patent: October 13, 2015Assignee: SK Hynix Inc.Inventors: Jun Hyuk Lee, Eun Joung Lee, Yoon Soo Jang, Seung Won Kim
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Publication number: 20150213902Abstract: A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array configured to include memory cells, a peripheral circuit configured to perform an erase operation and a soft program operation and a control circuit configured to control the peripheral circuit so that the memory cells are programmed though a hot carrier injection HCI method when the soft program operation is performed.Type: ApplicationFiled: April 10, 2015Publication date: July 30, 2015Inventor: Yoon Soo JANG
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Patent number: 9001592Abstract: A semiconductor memory device is operated by forming channels in a cell string including a plurality of memory cells and coupled between a bit line and a source line, applying first and second erase voltages having different levels to the channels through the bit line and the source line, respectively, and applying a first word line voltage to at least one word line among word lines coupled to the plurality of memory cells.Type: GrantFiled: September 6, 2012Date of Patent: April 7, 2015Assignee: SK Hynix Inc.Inventor: Yoon Soo Jang
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Publication number: 20150009758Abstract: A semiconductor memory device and a method of operating the same are provided. The semiconductor memory device includes memory cells stacked on a substrate. The method includes applying a reference voltage to an unselected drain select line, applying a drain selection voltage to a selected drain select line, and applying a word line voltage to a normal word line. Before the word line voltage is applied to the normal word line, a positive voltage is applied to a dummy word line to bounce the unselected drain select line.Type: ApplicationFiled: January 14, 2014Publication date: January 8, 2015Applicant: SK hynix Inc.Inventor: Yoon Soo JANG
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Publication number: 20140160846Abstract: A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array including memory blocks, a voltage generator configured to generate a precharge voltage; and a read and write circuit coupled to the memory blocks through bit lines, and configured to supply the precharge voltage to the bit lines when a selected memory block is accessed. Here, the precharge voltage varies depending on a distance between the read and write circuit and the selected memory block.Type: ApplicationFiled: March 14, 2013Publication date: June 12, 2014Applicant: SK hynix Inc.Inventors: Jun Hyuk LEE, Eun Joung LEE, Yoon Soo JANG, Seung Won KIM
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Publication number: 20140056075Abstract: A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array configured to include memory cells, a peripheral circuit configured to perform an erase operation and a soft program operation and a control circuit configured to control the peripheral circuit so that the memory cells are programmed though a hot carrier injection HCI method when the soft program operation is performed.Type: ApplicationFiled: December 18, 2012Publication date: February 27, 2014Applicant: SK HYNIX INC.Inventor: Yoon Soo Jang
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Publication number: 20130182521Abstract: A semiconductor memory device is operated by forming channels in a cell string including a plurality of memory cells and coupled between a bit line and a source line, applying first and second erase voltages having different levels to the channels through the bit line and the source line, respectively, and applying a first word line voltage to at least one word line among word lines coupled to the plurality of memory cells.Type: ApplicationFiled: September 6, 2012Publication date: July 18, 2013Inventor: Yoon Soo JANG
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Patent number: 6556493Abstract: A method for testing a memory cell of the semiconductor device includes the steps of determining a reference memory cell and setting a first trip point by measuring a first drain current of a reference memory cell, testing an erasure verifying memory cell to be tested at a room temperature, detecting a fourth drain current by measuring the erasure verifying memory cell at a hot temperature and comparing the fourth drain current with the first drain current, varying the first drain trip point according to a current difference between the firs and the fourth drain currents and setting a second trip point of the erasure verifying memory cell according to the varied first trip point.Type: GrantFiled: December 28, 2001Date of Patent: April 29, 2003Assignee: Hynix Semiconductor Inc.Inventors: Young-Seon You, Yoon-Soo Jang, Mun-Hwa Lee, Tae-Kyu Kim
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Publication number: 20020136071Abstract: A method for testing a memory cell of the semiconductor device includes the steps of determining a reference memory cell and setting a first trip point by measuring a first drain current of a reference memory cell, testing an erasure verifying memory cell to be tested at a room temperature, detecting a fourth drain current by measuring the erasure verifying memory cell at a hot temperature and comparing the fourth drain current with the first drain current, varying the first drain trip point according to a current difference between the firs and the fourth drain currents and setting a second trip point of the erasure verifying memory cell according to the varied first trip point.Type: ApplicationFiled: December 28, 2001Publication date: September 26, 2002Inventors: Young-Seon You, Yoon-Soo Jang, Mun-Hwa Lee, Tae-Kyu Kim