Abstract: A device and method for performing switchover operations in a computer system having at least two execution units, a changeover switch being provided which switches between at least two operating modes, a first operating mode corresponding to a comparison mode, and a second operating mode corresponding to a performance mode, in addition, a comparator being provided which is activated in the comparison mode, in which an arrangement provides desired switchover detection, the arrangement for desired switchover detection controlling the changeover switch in order to switch from one operating mode to another.

Abstract: A method for processing data words and/or instructions, a distinction being made, in the processing, between at least two operating modes, and a first operating mode corresponding to a compare mode and a second operating mode corresponding to a performance mode, in the compare mode, a comparator unit being activated and this comparator unit being deactivated in the performance mode, wherein the comparator unit is activated for the compare mode as a function of two equal data words and/or instructions getting to be processed and the at least equal data words and/or instructions in each case being distributed by a control unit to the at least two execution units.

Abstract: To handle the errors occurring in running a computer program on a computer system (1) in the most flexible possible manner and thereby ensure the greatest possible availability of the computer program, an identifier is assigned to the error handling signal generated by an error detection unit (5) when an error occurs, an error handling routine is selected from a preselectable set of error handling routines as a function of this identifier and the selected error handling routine is executed.

Abstract: A method for rebooting a system having a plurality of execution units in a safe operating mode; after receiving a request signal, the signals delivered by the execution units are compared with one another as a function of a comparison operation to detect a signal deviation.

Abstract: A method and device for switching over in a computer system having at least two processing units, a switchover means and a compare means, switching over taking place between at least two operating modes, and a first operating mode corresponding to a compare mode, and a second operating mode corresponding to a performance mode; at least one first information and one second information being compared in the compare mode, wherein the compare means and the switchover means are provided structurally external to the processing units, at least one buffer memory being provided and at least one of the informations to be compared in the compare mode being buffer-stored for a specifiable and/or ascertainable time in the buffer memory in such a way that the first and the second information are able to be directly compared to each other.

Abstract: A method and a device for correcting errors in a processor having two execution units as well as a corresponding processor, in which registers are provided in which instructions and/or associated information can be stored, the instructions being processed redundantly in both execution units and comparison means being included, and being such that by comparing the instructions and/or the associated information a deviation and thus an error is detected, a division of the registers of the processor into first registers and second registers being provided, the first registers being such that a specifiable state of the processor and contents of the second registers are derivable from them, means for a rollback being included, which are such that at least one instruction and/or the information in the first registers are rolled back and are executed anew and/or restored.