Abstract: An integrated circuit (10) for use in a DC-DC converter is protected against damage from electrostatic discharge when not in use in the DC-DC converter. The integrated circuit includes a control circuit (11) and a switching transistor (12, 20) coupled between a first and second terminal (10a, b) of the integrated circuit (10). During DC-DC conversion the control circuit controls periodic switching of the switching transistor. The integrated circuit (10) furthermore comprises an electrostatic discharge (ESD) protection circuit, with a high pass filter circuit (160, 162) with inputs between terminals (10a, b) of the integrated circuit (10) and an output coupled to a detector transistor (164). The detector transistor (164) charges a chargeable circuit (17). From a node between the detector transistor (164) and the chargeable circuit (17) the switching transistor (12, 20) is made conductive when the detector transistor (164) becomes conductive.

Abstract: Present invention relates to an electrostatic discharge protection circuit for a transistor circuit having electrostatic discharge protection circuits coupled to an input and to an output terminal. The protection circuits comprise delay means having a predetermined delay time and switchable connecting means connected between said input terminal and a control terminal of said transistor circuit. The delay means are configured for activating said switchable connecting means for said predetermined delay time in response to an electrostatic discharge at said input terminal.

Abstract: The present invention relates to an electronic device including electronic circuitry, wherein the circuitry includes a first switching transistor (MN1) being adapted to serve as an integrated switch, and a first clamp transistor (MNC1) being coupled to the first switching transistor and being adapted to protect the first switching transistor (MN1) if an ESD event occurs.

Abstract: An integrated circuit (10) for use in a DC-DC converter is protected against damage from electrostatic discharge when not in use in the DC-DC converter. The integrated circuit includes a control circuit (11) and a switching transistor (12, 20) coupled between a first and second terminal (10a, b) of the integrated circuit (10). During DC-DC conversion the control circuit controls periodic switching of the switching transistor. The integrated circuit (10) furthermore comprises an electrostatic discharge (ESD) protection circuit, with a high pass filter circuit (160, 162) with inputs between terminals (10a, b) of the integrated circuit (10) and an output coupled to a detector transistor (164). The detector transistor (164) charges a chargeable circuit (17). From a node between the detector transistor (164) and the chargeable circuit (17) the switching transistor (12, 20) is made conductive when the detector transistor (164) becomes conductive.

Abstract: The present invention relates to an electronic device including electronic circuitry, wherein the circuitry includes a first switching transistor (MN1) being adapted to serve as an integrated switch, and a first clamp transistor (MNC1) being coupled to the first switching transistor and being adapted to protect the first switching transistor (MN1) if an ESD event occurs.

Abstract: Method and arrangement for cyclically AD converting an analog signal with a sampler capacitance and an integrator capacitance, comprising the steps of generating a difference signal multiplied by the ratio of said capacitances from the analog signal and a reference signal, deriving a digital bit from said difference signal, doubling the difference signal multiplied by said ratio, shifting said doubled signal by the reference signal multiplied by said ratio and using the shifted signal as difference signal multiplied by said ratio for the next cycle.

Abstract: Method and arrangement for cyclically AD converting an analog signal with a sampler capacitance and an integrator capacitance, comprising the steps of generating a difference signal multiplied by the ratio of said capacitances from the analog signal and a reference signal, deriving a digital bit from said difference signal, doubling the difference signal multiplied by said ratio, shifting said doubled signal by the reference signal multiplied by said ratio and using the shifted signal as difference signal multiplied by said ratio for the next cycle.

Abstract: Present invention relates to an electrostatic discharge protection circuit for a transistor circuit having electrostatic discharge protection circuits coupled to an input and to an output terminal. The protection circuits comprise delay means having a predetermined delay time and switchable connecting means connected between said input terminal and a control terminal of said transistor circuit. The delay means are configured for activating said switchable connecting means for said predetermined delay time in response to an electrostatic discharge at said input terminal.