Patents by Inventor Yoseph L. Linde

Yoseph L. Linde has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5790057
    Abstract: The invention relates to the efficient coding of packetized binary (NRZ) data, for example Ethernet packets, over a binary channel. Since Ethernet packetized data has three states (0, 1, and Idle), the theoretical bandwidth required for transmission, assuming completely random packets of arbitrary length and arbitrary interpacket idle periods, i.e. gaps, is 1.585 the data rate. The invention uses the information that both packets and gaps have predetermined minimum lengths constructs more efficient codes. In particular, a coding scheme is shown that provides in two states signal requiring a bandwidth of only 1.25 the three state signal data rate.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: August 4, 1998
    Assignee: LANart Corporation
    Inventors: Yoseph L. Linde, Jeffrey F. Tabor
  • Patent number: 5745670
    Abstract: A fault tolerant power supply system includes a plurality of devices coupled to a common power distribution bus. The devices are arranged and connected in a hierarchical order. The system provides that the devices of higher rank or position in the hierarchy to obtain priority in drawing power from the bus. Each device is coupled to the next adjacent device via a control status line that indicates whether there has been a failure of the power supply of any device higher up in the hierarchy. In the event that the local power supply of a device fails, it can be selectively connected to the power distribution bus to draw power, only if the control status line indicates that there have no failures in the devices having a higher hierarchical rank. Once connected to power distribution bus, if a higher ranking device should experience a power supply failure, the device will be disconnected from the power distribution bus and the higher ranking device connected to the power distribution bus.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: April 28, 1998
    Assignee: LANart Corporation
    Inventor: Yoseph L. Linde
  • Patent number: 4611133
    Abstract: A logic array which is small in size and low in power dissipation uses only one clock signal. The array is fully precharged by precharging a first portion and a second portion and then applying ground to the first portion while delayably applying the ground to the second portion. The address is read into the first portion during the precharging to speed up operation of the array.
    Type: Grant
    Filed: May 12, 1983
    Date of Patent: September 9, 1986
    Assignee: Codex Corporation
    Inventors: Benjamin C. Peterson, Yoseph L. Linde, Yigal Brandman