Patents by Inventor Yoseph Pinto
Yoseph Pinto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11653463Abstract: A memory card is provided with various pad layouts to prevent a data signal pad from contacting a power contact in a host during insertion and removal of the memory card. The memory card can have a form factor and features that accommodate a relatively-large memory with relatively-high performance and accompanying thermal conditions. An efficient card lock mechanism is also provided.Type: GrantFiled: June 12, 2020Date of Patent: May 16, 2023Assignee: Western Digital Technologies, Inc.Inventors: Yoseph Pinto, Michael Lavrentiev
-
Patent number: 11556424Abstract: A storage system comprises a non-volatile memory configured to store boot code and a control circuit connected to the non-volatile memory. In response to a first request from a host to transmit the boot code, the storage system commences transmission of the boot code to the host at a first transmission speed. Before successfully completing the transmission of the boot code to the host at the first transmission speed, it is determined the boot code transmission has failed. Therefore, the host will issue a second request for the boot code. In response to the second request for the boot code, and recognizing that this is a fallback condition because the previous transmission of the boot code failed, the storage apparatus re-transmits the boot code to the host at a lower transmission speed than the first transmission speed.Type: GrantFiled: June 6, 2021Date of Patent: January 17, 2023Assignee: Western Digital Technologies, Inc.Inventors: Yoseph Pinto, Rampraveen Somasundaram
-
Patent number: 11461260Abstract: A memory card has a plurality of pads including a first set of pads located to connect with host contacts arranged in a first configuration for communication according to the micro Secure Digital (microSD) standard, a second set of pads located to connect with host contacts arranged in a second configuration for communication according to the Peripheral Component Interface express (PCIe) protocol, and a third set of pads located to connect with host contacts arranged in a third configuration for communication according to the Universal Flash Storage (UFS) standard. The plurality of pads includes one or more common pads that are common to the second set of pads and the third set of pads.Type: GrantFiled: February 19, 2021Date of Patent: October 4, 2022Assignee: Western Digital Technologies, Inc.Inventors: Yoseph Pinto, Shiva K, Eldhose Peter, Rakesh Balakrishnan
-
Publication number: 20220269629Abstract: A memory card has a plurality of pads including a first set of pads located to connect with host contacts arranged in a first configuration for communication according to the micro Secure Digital (microSD) standard, a second set of pads located to connect with host contacts arranged in a second configuration for communication according to the Peripheral Component Interface express (PCIe) protocol, and a third set of pads located to connect with host contacts arranged in a third configuration for communication according to the Universal Flash Storage (UFS) standard. The plurality of pads includes one or more common pads that are common to the second set of pads and the third set of pads.Type: ApplicationFiled: February 19, 2021Publication date: August 25, 2022Applicant: Western Digital Technologies, Inc.Inventors: Yoseph Pinto, Shiva K, Eldhose Peter, Rakesh Balakrishnan
-
Publication number: 20220229731Abstract: A storage system comprises a non-volatile memory configured to store boot code and a control circuit connected to the non-volatile memory. In response to a first request from a host to transmit the boot code, the storage system commences transmission of the boot code to the host at a first transmission speed. Before successfully completing the transmission of the boot code to the host at the first transmission speed, it is determined the boot code transmission has failed. Therefore, the host will issue a second request for the boot code. In response to the second request for the boot code, and recognizing that this is a fallback condition because the previous transmission of the boot code failed, the storage apparatus re-transmits the boot code to the host at a lower transmission speed than the first transmission speed.Type: ApplicationFiled: June 6, 2021Publication date: July 21, 2022Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Yoseph Pinto, Rampraveen Somasundaram
-
Publication number: 20210368636Abstract: A memory card is provided with various pad layouts to prevent a data signal pad from contacting a power contact in a host during insertion and removal of the memory card. The memory card can have a form factor and features that accommodate a relatively-large memory with relatively-high performance and accompanying thermal conditions. An efficient card lock mechanism is also provided.Type: ApplicationFiled: June 12, 2020Publication date: November 25, 2021Applicant: Western Digital Technologies, Inc.Inventors: Yoseph Pinto, Michael Lavrentiev
-
Patent number: 11137932Abstract: Technology for detecting a capability set of a removable integrated circuit card, such as a removable memory card, is disclosed. The removable integrated circuit card has one or more capability pads that indicate a capability set of the removable integrated circuit card. The physical condition may be a physical configuration of one or more capability pads, such as size or location of a capability pad. A host device is able to determine the capability set of the removable integrated circuit card based on the physical condition of the capability pads. The host device may determine the capability set without the card being powered on, without reading a register in the card, or without exchanging commands with the card.Type: GrantFiled: December 2, 2019Date of Patent: October 5, 2021Assignee: Western Digital Technologies, Inc.Inventors: Rotem Sela, Yoseph Pinto
-
Patent number: 11087195Abstract: Memory cards having a nano card form factor configured according to different card standards. The nano card have a pair of opposed surfaces having a length and width of a nano SIM card in which a first group of interface pads on one of the opposed surfaces configured to mate with contact pins of a host device card slot operating per a PCIe memory card standard and a second group of interface pads configured to mate with contact pins of a host device card slot operating per a second memory card standard different than the PCIe memory card standard. The nano cards have patterns of pads allowing for vertical and horizontal insertion to a host device card slot being backward compatible with legacy host device card slots.Type: GrantFiled: April 4, 2019Date of Patent: August 10, 2021Assignee: Western Digital Technologies, Inc.Inventors: Yoseph Pinto, Shajith Musaliar Sirajudeen
-
Publication number: 20210165595Abstract: Technology for detecting a capability set of a removable integrated circuit card, such as a removable memory card, is disclosed. The removable integrated circuit card has one or more capability pads that indicate a capability set of the removable integrated circuit card. The physical condition may be a physical configuration of one or more capability pads, such as size or location of a capability pad. A host device is able to determine the capability set of the removable integrated circuit card based on the physical condition of the capability pads. The host device may determine the capability set without the card being powered on, without reading a register in the card, or without exchanging commands with the card.Type: ApplicationFiled: December 2, 2019Publication date: June 3, 2021Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Rotem Sela, Yoseph Pinto
-
Patent number: 11023394Abstract: A memory card socket interconnector is disclosed including a pair of cavities configured to receive a pair of memory cards. The cavities include patterns of memory card interconnect pads. A second surface of the socket interconnector includes socket interconnect pads, distributed across the second surface of the socket interconnector, which are electrically coupled to the memory card interconnect pads. The memory card socket interconnector may further include electrically conductive balls provided between the memory card pads and the memory card interconnect pads in each cavity to enable good electrical contact between the memory card pads and the memory card interconnect pads.Type: GrantFiled: June 7, 2019Date of Patent: June 1, 2021Assignee: Western Digital Technologies, Inc.Inventors: John Burke, Yoseph Pinto
-
Publication number: 20200264990Abstract: A memory card socket interconnector is disclosed including a pair of cavities configured to receive a pair of memory cards. The cavities include patterns of memory card interconnect pads. A second surface of the socket interconnector includes socket interconnect pads, distributed across the second surface of the socket interconnector, which are electrically coupled to the memory card interconnect pads. The memory card socket interconnector may further include electrically conductive balls provided between the memory card pads and the memory card interconnect pads in each cavity to enable good electrical contact between the memory card pads and the memory card interconnect pads.Type: ApplicationFiled: June 7, 2019Publication date: August 20, 2020Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: John Burke, Yoseph Pinto
-
Publication number: 20040064612Abstract: A memory system (e.g., memory card) that is able to operate internally in accordance with a first protocol while communicating externally in a second protocol is disclosed. In one embodiment, a memory card operates in accordance with a memory card protocol (e.g., MMC) internally and communicates with a host over a bus protocol (e.g., I2C). As a result, communications between the memory card and the host can utilize the bus protocol by having the bus protocol include the memory card protocol. The memory system is typically a non-volatile memory product or device that provides binary or multi-state data storage.Type: ApplicationFiled: September 26, 2002Publication date: April 1, 2004Applicant: SanDisk CorporationInventors: Yoseph Pinto, Micky Holtzman