Patents by Inventor Yoshiaki Hagiwara
Yoshiaki Hagiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180033760Abstract: A conductive joining material and conductive joined structure for joining two joining members by a joining layer using metal nanoparticles at the time of which even if there is a difference in the amounts of heat expansion due to a difference in linear thermal expansion coefficients between these two joining members and further use at a high temperature is sought, it is possible to adjust the amount of heat expansion of the joining layer to a suitable value between the two joining members to ease the thermal stress occurring at the joining layer and possible to sufficiently hold the joint strength between the two joining members are provided.Type: ApplicationFiled: January 26, 2016Publication date: February 1, 2018Applicant: NIPPON STEEL & SUMITOMO METAL CORPORATIONInventors: Shinji ISHIKAWA, Yoshiaki HAGIWARA, Norie MATSUBARA, Tomohiro UNO, Takayuki SHIMIZU
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Patent number: 9812421Abstract: Provided is a bonding wire capable of reducing the occurrence of defective loops. The bonding wire includes: a core material which contains more than 50 mol % of a metal M; an intermediate layer which is formed over the surface of the core material and made of Ni, Pd, the metal M, and unavoidable impurities, and in which the concentration of the Ni is 15 to 80 mol %; and a coating layer formed over the intermediate layer and made of Ni, Pd and unavoidable impurities. The concentration of the Pd in the coating layer is 50 to 100 mol %. The metal M is Cu or Ag, and the concentration of Ni in the coating layer is lower than the concentration of Ni in the intermediate layer.Type: GrantFiled: December 4, 2014Date of Patent: November 7, 2017Assignees: NIPPON STEEL & SUMIKIN MATERIALS CO., LTD., NIPPON MICROMETAL CORPORATIONInventors: Tomohiro Uno, Yoshiaki Hagiwara, Tetsuya Oyamada, Daizo Oda
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Publication number: 20160315063Abstract: Provided is a bonding wire capable of reducing the occurrence of defective loops. The bonding wire includes: a core material which contains more than 50 mol % of a metal M; an intermediate layer which is formed over the surface of the core material and made of Ni, Pd, the metal M, and unavoidable impurities, and in which the concentration of the Ni is 15 to 80 mol %; and a coating layer formed over the intermediate layer and made of Ni, Pd and unavoidable impurities. The concentration of the Pd in the coating layer is 50 to 100 mol %. The metal M is Cu or Ag, and the concentration of Ni in the coating layer is lower than the concentration of Ni in the intermediate layer.Type: ApplicationFiled: December 4, 2014Publication date: October 27, 2016Inventors: Tomohiro UNO, Yoshiaki HAGIWARA, Tetsuya OYAMADA, Daizo ODA
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Patent number: 6800527Abstract: A semiconductor nonvolatile memory device improving reproducibility and reliability of insulation breakage of a silicon oxide film and capable of reducing the manufacturing cost and a method for production of the same, wherein each of the memory cells arranged in a matrix form has an insulating film breakage type fuse comprising an impurity region of a first conductivity type formed on a semiconductor substrate, a first insulating film formed on the semiconductor substrate while covering the impurity region, an opening formed in the first insulating film so as to reach the impurity region, and a first semiconductor layer of a first conductivity type, a second insulating film, and a second semiconductor layer of a second conductivity type successively stacked in the opening from the impurity region side, or has an insulating film breakage type fuse comprising an impurity region of a first conductivity type in the first semiconductor layer having an SOI structure, a first insulating film on the SOI layer, an opType: GrantFiled: February 14, 2003Date of Patent: October 5, 2004Assignee: Sony CorporationInventors: Yoshiaki Hagiwara, Hideaki Kuroda, Michitaka Kubota, Akira Nakagawara
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Patent number: 6697317Abstract: A disk 1 comprised by a substrate 11, a signal layer 12 made of aluminum in which pits 14 are formed, and a protective plate 13. The information reproducing apparatus emits an electron beam E from an electron gun 40 to the signal layer 12 of the disk 1, detects a change of the incident intensity of the reflection thereof via a detector 42, and reproduces the information of the disk 1 by a reproducing circuit 5. A recording medium 20 comprised by a conductive layer 22, an insulating layer 23, and island-like fixed electrodes 24 thereon electrically insulated from the periphery with a memory function imparted to the fixed electrodes. For the writing, electrons are injected into the fixed electrodes by the electron gun. For full erasure, a voltage is applied to the conductive layer 22. For the reading, the electrostatic effect of the counter electrodes and the fixed electrodes is utilized. This enables an increase of the volume of information and an enhancement of precision of the reading of the information.Type: GrantFiled: October 1, 2002Date of Patent: February 24, 2004Assignee: Sony CorporationInventor: Yoshiaki Hagiwara
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Publication number: 20030146467Abstract: A semiconductor nonvolatile memory device improving reproducibility and reliability of insulation breakage of a silicon oxide film and capable of reducing the manufacturing cost and a method for production of the same, wherein each of the memory cells arranged in a matrix form has an insulating film breakage type fuse comprising an impurity region of a first conductivity type formed on a semiconductor substrate, a first insulating film formed on the semiconductor substrate while covering the impurity region, an opening formed in the first insulating film so as to reach the impurity region, and a first semiconductor layer of a first conductivity type, a second insulating film, and a second semiconductor layer of a second conductivity type successively stacked in the opening from the impurity region side, or has an insulating film breakage type fuse comprising an impurity region of a first conductivity type in the first semiconductor layer having an SOI structure, a first insulating film on the SOI layer, an opType: ApplicationFiled: February 14, 2003Publication date: August 7, 2003Inventors: Yoshiaki Hagiwara, Hideaki Kuroda, Michitaka Kubota, Akira Nakagawara
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Patent number: 6583490Abstract: A semiconductor nonvolatile memory device improving reproducibility and reliability of insulation breakage of a silicon oxide film and capable of reducing the manufacturing cost and a method for production of the same, wherein each of the memory cells arranged in a matrix form has an insulating film breakage type fuse comprising an impurity region of a first conductivity type formed on a semiconductor substrate, a first insulating film formed on the semiconductor substrate while covering the impurity region, an opening formed in the first insulating film so as to reach the impurity region, and a first semiconductor layer of a first conductivity type, a second insulating film, and a second semiconductor layer of a second conductivity type successively stacked in the opening from the impurity region side, or has an insulating film breakage type fuse comprising an impurity region of a first conductivity type in the first semiconductor layer having an SOI structure, a first insulating film on the SOI layer, an opType: GrantFiled: June 26, 2001Date of Patent: June 24, 2003Assignee: Sony CorporationInventors: Yoshiaki Hagiwara, Hideaki Kuroda, Michitaka Kubota, Akira Nakagawara
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Publication number: 20030021213Abstract: A disk 1 comprised by a substrate 11, a signal layer 12 made of aluminum in which pits 14 are formed, and a protective plate 13. The information reproducing apparatus emits an electron beam E from an electron gun 40 to the signal layer 12 of the disk 1, detects a change of the incident intensity of the reflection thereof via a detector 42, and reproduces the information of the disk 1 by a reproducing circuit 5.Type: ApplicationFiled: October 1, 2002Publication date: January 30, 2003Inventor: Yoshiaki Hagiwara
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Patent number: 6483796Abstract: An information reproducing apparatus emits an electron beam E from an electron gun 40 to a signal layer 12 of a disk 1, detects a change of the incident intensity of the reflection thereof via a detector 42, and reproduces the information of the disk 1 by a reproducing circuit 5. A recording medium 20 has a conductive layer 22, an insulating layer 23, and island-like fixed electrodes 24 thereon electrically insulated from the periphery with a memory function imparted to the fixed electrodes. For the writing, electrons are injected into the fixed electrodes by the electron gun. For full erasure, a voltage is applied to the conductive layer 22. For the reading, the electrostatic effect of the counter electrodes and the fixed electrodes is utilized. This enables an increase of the volume of information and an enhancement of precision of the reading of the information.Type: GrantFiled: November 3, 2000Date of Patent: November 19, 2002Assignee: Sony CorporationInventor: Yoshiaki Hagiwara
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Publication number: 20020105050Abstract: A semiconductor nonvolatile memory device improving reproducibility and reliability of insulation breakage of a silicon oxide film and capable of reducing the manufacturing cost and a method for production of the same, wherein each of the memory cells arranged in a matrix form has an insulating film breakage type fuse comprising an impurity region of a first conductivity type formed on a semiconductor substrate, a first insulating film formed on the semiconductor substrate while covering the impurity region, an opening formed in the first insulating film so as to reach the impurity region, and a first semiconductor layer of a first conductivity type, a second insulating film, and a second semiconductor layer of a second conductivity type successively stacked in the opening from the impurity region side, or has an insulating film breakage type fuse comprising an impurity region of a first conductivity type in the first semiconductor layer having an SOI structure, a first insulating film on the SOI layer, an opType: ApplicationFiled: June 26, 2001Publication date: August 8, 2002Inventors: Yoshiaki Hagiwara, Hideaki Kuroda, Michitaka Kubota, Akira Nakagawara
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Patent number: 6157610Abstract: A disk 1 comprised by a substrate 11, a signal layer 12 made of aluminum in which pits 14 are formed, and a protective plate 13. The information reproducing apparatus emits an electron beam E from an electron gun 40 to the signal layer 12 of the disk 1, detects a change of the incident intensity of the reflection thereof via a detector 42, and reproduces the information of the disk 1 by a reproducing circuit 5. A recording medium 20 comprised by a conductive layer 22, an insulating layer 23, and island-like fixed electrodes 24 thereon electrically insulated from the periphery with a memory function imparted to the fixed electrodes. For the writing, electrons are injected into the fixed electrodes by the electron gun. For full erasure, a voltage is applied to the conductive layer 22. For the reading, the electrostatic effect of the counter electrodes and the fixed electrodes is utilized. This enables an increase of the volume of information and an enhancement of precision of the reading of the information.Type: GrantFiled: July 14, 1998Date of Patent: December 5, 2000Assignee: Sony CorporationInventor: Yoshiaki Hagiwara
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Patent number: 4851887Abstract: A solid state imager device having a charge accumulating region of a second conductivity type formed on the surface side of a semiconductor substrate of a first conductivity type which has a charge accumulating region of the second conductivity type laminated on the charge accumulating region, the second conductivity type region and the charge accumulating region forming a charge accumulating section, and a first conductivity type region formed on the surface of and/or on the side of the second conductivity type region, wherein if an excessive signal charge is produced in the charge accumulating section, the excessive signal charge is absorbed in the first conductivity type region, whereby brooming can be satisfactorily suppressed and higher integration of the device can be achieved.Type: GrantFiled: January 13, 1988Date of Patent: July 25, 1989Assignee: Sony CorporationInventor: Yoshiaki Hagiwara
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Patent number: 4840491Abstract: In a method of kneading rubber, rubber is kneaded with a kneading mixer, and the rubber thus kneaded is caused to pass through roll means to form a rubber sheet whose thickness is not more than 3 mm, whereby the rubber having a desired degree of plasticity can be obtained by using the kneading mixer only once.Type: GrantFiled: August 27, 1987Date of Patent: June 20, 1989Assignee: Bridgestone CorporationInventors: Yoshiaki Hagiwara, Hiromi Ishida, Takeyoshi Takahashi
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Patent number: 4242692Abstract: The present invention relates to a charge transfer device which allows change of the charge transfer direction wherein transfer portions are formed of generally rectangular shape which have a length in the charge transfer direction which gradually gets longer to the transition direction change area and widths which get smaller relative to the direction transverse to the charge transfer direction. The length times width of the transfer portions is made substantially constant. The feature providing that the transfer regions become narrower as they approach the portion of charge direction change allows the charge direction change to be relatively shorter than apparatus of the prior art thus resulting in greater efficiency, shorter charge transfer time, eliminates the requirement for direct current bias and a more integrated device is provided.Type: GrantFiled: May 31, 1979Date of Patent: December 30, 1980Assignee: Sony CorporationInventor: Yoshiaki Hagiwara
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Patent number: 4179793Abstract: A method of making a charge transfer device which has charge transfer portions arranged in a semiconductor substrate, each of said charge transfer portions having electrodes, and in which an effective asymmetrical potential is produced in each of the charge transfer portions in a carrier transfer direction by the affect of the potential of channel stopper regions upon charge transfer.Type: GrantFiled: October 12, 1977Date of Patent: December 25, 1979Assignee: Sony CorporationInventor: Yoshiaki Hagiwara
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Patent number: 4133099Abstract: A method of manufacturing charge transfer devices in which an asymmetrical potential well in the direction of charge transfer is formed by the shape of narrower portions of a transfer channel which is bordered by highly doped channel stoppers. Impurities are diffused through a first mask into a polycrystalline silicon layer on the surface of a semiconductor substrate to construct transfer electrodes of highly doped polycrystalline layer. Then impurities are diffused into a semiconductor substrate through openings bordering on one edge with a first mask to form the highly doped portions to make the narrower portions of the transfer channel to assure that the edges of the transfer electrode and the edge of the narrower portion are aligned.Type: GrantFiled: August 2, 1977Date of Patent: January 9, 1979Assignee: Sony CorporationInventor: Yoshiaki Hagiwara
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Patent number: 4064524Abstract: A charge coupled device capable of operating with two phase clock pulses wherein asymmetrical potential wells are established by the use of channel stoppers which are formed on opposite edges of the charge coupled device and which have restricted portions through which the charges can flow from one storage area to the other.The invention also comprises an information storage device including an array of photosensors with certain photosensors coupled to a particular charge transfer device according to the invention wherein channel stoppers with restricted passages are formed so as to provide asymmetrical charge transfer between the photosensors and various elements of the charge transfer device.Type: GrantFiled: July 9, 1976Date of Patent: December 20, 1977Assignee: Sony CorporationInventors: Yoshiaki Hagiwara, Hiroshi Yamazaki
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Patent number: RE30917Abstract: A charge coupled device capable of operating with two phase clock pulses wherein asymmetrical potential wells are established by the use of channel stoppers which are formed on opposite edges of the charge coupled device and which have restricted portions through which the charges can flow from one storage area to the other.The invention also comprises an information storage device including an array of photosensors with certain photosensors coupled to a particular charge transfer device according to the invention wherein channel stoppers with restricted passages are formed so as to provide asymmetrical charge transfer between the photosensors and various elements of the charge transfer device.Type: GrantFiled: December 17, 1979Date of Patent: April 27, 1982Assignee: Sony CorporationInventors: Yoshiaki Hagiwara, Hiroshi Yamazaki