Abstract: It is intended to provide a substrate treatment device capable of adjusting both of a growth speed and an etching speed in a selective epitaxial growth, avoiding particle generation from nozzles, and achieving good etching characteristics. A substrate treatment device for selectively growing an epitaxial film on a surface of a substrate by alternately supplying a raw material gas containing silicon and an etching gas to a treatment chamber, the substrate treatment device being provided with a substrate support member for supporting the substrate in the treatment chamber, a heating member provided outside the treatment chamber for heating the substrate and an atmosphere of the treatment chamber, a gas supply system provided inside the treatment chamber, and a discharge port opened on the treatment chamber, wherein the gas supply system comprises first gas supply nozzles for supplying the raw material gas and second gas supply nozzles for supplying the etching gas.

Abstract: Disclosed is a producing method of a semiconductor device, including: loading a silicon substrate into a processing chamber, the silicon substrate having a silicon nitride film or a silicon oxide film on at least a portion of a surface thereof and a silicon surface being exposed from the surface; and alternately repeating a first introducing at least a silane-compound gas into the processing chamber and a second introducing at least etching gas a plurality of times to selectively grow an epitaxial film on the silicon surface, wherein the alternate repeating is started with the second introducing prior to the first introducing.

Abstract: In a dry cleaning process, breakage of a gas supply pipe can be prevented, and maintenance efficiency can be increased. There is provided a method of manufacturing a semiconductor device, comprising: (a) loading a substrate into a process chamber; (b) forming a silicon film or a silicon compound film on the substrate loaded in the process chamber by supplying a raw-material gas to a gas supply pipe disposed in the process chamber to introduce the raw-material gas into the process chamber; (c) unloading the substrate from the process chamber; (d) heating an inside of the process chamber after unloading the substrate to generate a crack in a thin film formed inside the process chamber; (e) decreasing an inside temperature of the process chamber after carrying out the step (d) with the substrate unloaded from the process chamber; and (f) introducing a cleaning gas into the process chamber by supplying the cleaning gas to the gas supply pipe after the step (e) with the substrate unloaded from the process chamber.

Abstract: In a dry cleaning process, breakage of a gas supply pipe can be prevented, and maintenance efficiency can be increased. There is provided a substrate processing apparatus comprising: a process chamber configured to process a substrate; a heater configured to heat an inside of the process chamber; a gas supply pipe installed in the process chamber; a gas supply system configured to supply at least a cleaning gas to the gas supply pipe to introduce the cleaning gas into the process chamber; and a control unit configured to control the heater and gas supply system with the substrate unloaded from the process chamber to perform heating an inside of the process chamber to generate a crack in a thin film formed inside the process chamber; decreasing an inside temperature of the process chamber after the crack is generated in the thin film; and introducing the cleaning gas into the process chamber by supplying the cleaning gas to the gas supply pipe after the inside temperature of the process chamber is decreased.

Abstract: It is intended to provide a substrate treatment device capable of adjusting both of a growth speed and an etching speed in a selective epitaxial growth, avoiding particle generation from nozzles, and achieving good etching characteristics. A substrate treatment device for selectively growing an epitaxial film on a surface of a substrate by alternately supplying a raw material gas containing silicon and an etching gas to a treatment chamber, the substrate treatment device being provided with a substrate support member for supporting the substrate in the treatment chamber, a heating member provided outside the treatment chamber for heating the substrate and an atmosphere of the treatment chamber, a gas supply system provided inside the treatment chamber, and a discharge port opened on the treatment chamber, wherein the gas supply system comprises first gas supply nozzles for supplying the raw material gas and second gas supply nozzles for supplying the etching gas.

Abstract: A negative voltage detection circuit including first and second MOS transistor circuits configured to change a dimension size of a transistor based on a control signal, a first comparator circuit, a gate electrode of the second MOS transistor circuit commonly coupled to the gate electrode of the first MOS transistor circuit forming a current mirror circuit, a resistive divider supplied with a negative voltage to be detected, and coupled to the end of the current path of the second MOS transistor circuit to generate a second voltage, a second voltage comparator circuit to compare the second voltage with a reference voltage and to generate a detection signal corresponding to the value of the negative voltage, and a detection circuit for detecting a temperature or power supply voltage, generate the control signal corresponding to the detection result, and supply the control signal to the first and second MOS transistor circuits.

Abstract: In a dry cleaning process, breakage of a gas supply pipe can be prevented, and maintenance efficiency can be increased. There is provided a method of manufacturing a semiconductor device, the method including: loading a substrate into a process chamber; forming a silicon film or a silicon compound film on the substrate loaded in the process chamber by supplying a raw-material gas to a gas supply pipe disposed in the process chamber to introduce the raw-material gas into the process chamber; unloading the substrate from the process chamber; heating an inside of the process chamber; decreasing an inside temperature of the process chamber after the heating of the inside of the process chamber; and introducing cleaning gas into the process chamber by supplying the cleaning gas to the gas supply pipe after the decreasing of the inside temperature of the process chamber.

Abstract: Disclosed is a producing method of a semiconductor device, including: loading a silicon substrate into a processing chamber, the silicon substrate having a silicon nitride film or a silicon oxide film on at least a portion of a surface thereof and a silicon surface being exposed from the surface; and alternately repeating a first introducing at least a silane-compound gas into the processing chamber and a second introducing at least etching gas a plurality of times to selectively grow an epitaxial film on the silicon surface, wherein the alternate repeating is started with the second introducing prior to the first introducing.

Abstract: A negative voltage detection circuit including first and second MOS transistor circuits configured to change a dimension size of a transistor based on a control signal, a first comparator circuit, a gate electrode of the second MOS transistor circuit commonly coupled to the gate electrode of the first MOS transistor circuit forming a current mirror circuit, a resistive divider supplied with a negative voltage to be detected, and coupled to the end of the current path of the second MOS transistor circuit to generate a second voltage, a second voltage comparator circuit to compare the second voltage with a reference voltage and to generate a detection signal corresponding to the value of the negative voltage, and a detection circuit for detecting a temperature or power supply voltage, generate the control signal corresponding to the detection result, and supply the control signal to the first and second MOS transistor circuits.

Abstract: A semiconductor memory device includes a memory cell array, word lines, and a row decoder. The memory cell array includes memory cells arranged in a matrix. The memory cell includes a first MOS transistor having a charge accumulation layer and a control gate and a second MOS transistor. The word line connects the control gates of the first MOS transistors. The row decoder includes a first address decode circuit, a second address decode circuit, and a transfer gate. The first address decode circuit decodes m bits in a n-bit row address signal (m and n are a natural number satisfying the expression m<n). The second address decode circuit decodes (n?m) bits in the row address signal. The transfer gate supplies the output of the first address decode circuit to the word line according to the output of the second address decoded circuit.

Abstract: It is intended to provide a substrate treatment device capable of adjusting both of a growth speed and an etching speed in a selective epitaxial growth, avoiding particle generation from nozzles, and achieving good etching characteristics. A substrate treatment device for selectively growing an epitaxial film on a surface of a substrate by alternately supplying a raw material gas containing silicon and an etching gas to a treatment chamber, the substrate treatment device being provided with a substrate support member for supporting the substrate in the treatment chamber, a heating member provided outside the treatment chamber for heating the substrate and an atmosphere of the treatment chamber, a gas supply system provided inside the treatment chamber, and a discharge port opened on the treatment chamber, wherein the gas supply system comprises first gas supply nozzles for supplying the raw material gas and second gas supply nozzles for supplying the etching gas.

Abstract: A semiconductor memory device includes memory cells, a memory cell array, word lines, a first charge pump circuit, and a discharge circuit. The memory cell has a first MOS transistor with a stacked gate including a floating gate and a control gate. The memory cell array includes the memory cells arranged in a matrix. The word line connects commonly the control gates of the first MOS transistors in a same row. The first charge pump circuit is activated and generates a first voltage in a write operation and erase operation. The first voltage is supplied with either the well region or the word lines. The discharge circuit, when the first charge pump circuit is deactivated, discharges the charge generated by the first charge pump circuit to ground or to a power-supply potential, while causing current to flow to an output node of the first voltage.

Abstract: A semiconductor memory device includes a memory cell array, word lines, and a row decoder. The memory cell array includes memory cells arranged in a matrix. The memory cell includes a first MOS transistor having a charge accumulation layer and a control gate and a second MOS transistor. The word line connects the control gates of the first MOS transistors. The row decoder includes a first address decode circuit, a second address decode circuit, and a transfer gate. The first address decode circuit decodes m bits in a n-bit row address signal (m and n are a natural number satisfying the expression m<n). The second address decode circuit decodes (n?m) bits in the row address signal. The transfer gate supplies the output of the first address decode circuit to the word line according to the output of the second address decoded circuit.

Abstract: An oxidizer supply device (30) comprises an ozonizer (31) for generating ozone (32), a bubbler (34) wherein deionized water (35) is kept and an ozone supply pipe (33) for supplying ozone (32) from the ozonizer (31) is immersed in the deionized water (35) so as to bubble ozone, and a supply pipe (36) for supplying oxidizer (37) containing OH* generated by bubbling of the ozone (32). The device (30) is connected to a feed pipe (18) of an oxide film forming device (10). The oxidizer containing OH* generated by bubbling ozone in the water possesses a powerful oxidizing effect so oxide film can be formed on the wafer at a relatively low temperature in a short time. Semiconductor devices or circuit patterns previously formed on the wafer can be prevented from being damaged by plasma since no plasma is used. The throughput, performance and reliability of the oxide film forming device are therefore improved.

Abstract: A semiconductor memory device includes a memory cell array, word lines, bit lines, a control circuit, and a measurement circuit. The memory cell array has memory cells including a floating gate. The control circuit performs first control to collectively shift the threshold voltages of the memory cells to within a predetermined range with a first level as an upper limit, second control to shift a lower limit of the threshold voltages toward a second level lower than the first level, and third control to shift the lower limit to a third level. The measurement circuit measures the elapsed time from the start of the second control. The control circuit repeats the second control, and then terminates the second control when the lower limit reaches the second level or the elapsed time measured by the measurement circuit reaches the predetermined time and performing the third control.

Abstract: A semiconductor memory device includes memory cells, a memory cell array, word lines, a first charge pump circuit, and a discharge circuit. The memory cell has a first MOS transistor with a stacked gate including a floating gate and a control gate. The memory cell array includes the memory cells arranged in a matrix. The word line connects commonly the control gates of the first MOS transistors in a same row. The first charge pump circuit is activated and generates a first voltage in a write operation and erase operation. The first voltage is supplied with either the well region or the word lines. The discharge circuit, when the first charge pump circuit is deactivated, discharges the charge generated by the first charge pump circuit to ground or to a power-supply potential, while causing current to flow to an output node of the first voltage.

Abstract: A semiconductor memory device includes a memory cell array, word lines, bit lines, a control circuit, and a measurement circuit. The memory cell array has memory cells including a floating gate. The control circuit performs first control to collectively shift the threshold voltages of the memory cells to within a predetermined range with a first level as an upper limit, second control to shift a lower limit of the threshold voltages toward a second level lower than the first level, and third control to shift the lower limit to a third level. The measurement circuit measures the elapsed time from the start of the second control. The control circuit repeats the second control, and then terminates the second control when the lower limit reaches the second level or the elapsed time measured by the measurement circuit reaches the predetermined time and performing the third control.

Abstract: A semiconductor device includes a plurality of circuits, provided on a semiconductor substrate, each having a plurality of wiring layers. The plurality of circuits are designed using a common design core to which a plurality of wiring data are allocated.

Abstract: A semiconductor device includes a plurality of circuits, provided on a semiconductor substrate, each having a plurality of wiring layers. The plurality of circuits are designed using a common design core to which a plurality of wiring data are allocated.