Patents by Inventor Yoshiaki Kaneko
Yoshiaki Kaneko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100209129Abstract: An image forming apparatus includes: a first image forming unit which forms a first image on a first recording medium with a first material which is not thermally decolorized; a second image forming unit which forms a second image on a second recording medium with a second material which is thermally decolorized; a fixing unit which is on a common carrying path shared by the first recording medium and the second recording medium and fixes the first image to the first recording medium; and a control unit which controls the fixing unit so that the temperature of the second recording medium passing through the fixing unit becomes lower than a decolorizing temperature of the second material.Type: ApplicationFiled: February 12, 2010Publication date: August 19, 2010Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHAInventors: Yoshiaki KANEKO, Minoru YOSHIDA, Osamu TAKAGI, Takahito KABAI, Hiroyuki TAGUCHI, Ken IGUCHI
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Publication number: 20100196063Abstract: An image forming apparatus includes: a first image forming unit configured to form an image on a sheet using a first colorant to be heat-fixed on the sheet; a second image forming unit configured to form an image on the sheet using a second colorant that is erasable by heating; and a fixing device arranged further on a downstream side in a sheet conveying direction than the first image forming unit and further on an upstream side in the sheet conveying direction than the second image forming unit and capable of executing fixing processing for heat-fixing the image, which is formed on the sheet by the first image forming unit, on the sheet and executing erasing processing for heating the sheet, on which the image is formed with the second colorant, to erasing temperature to thereby erase the second colorant on the sheet.Type: ApplicationFiled: February 3, 2010Publication date: August 5, 2010Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHAInventors: Ken IGUCHI, Hiroyuki TAGUCHI, Minoru YOSHIDA, Osamu TAKAGI, Takahito KABAI, Yoshiaki KANEKO
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Publication number: 20100194839Abstract: An image erasing apparatus includes: a scanner which detects a side of a sheet on which an image is formed using a thermally decolorable coloring agent; a heat roller which provides heat for the sheet having the image formed thereon; and a controller which causes a quantity of heat provided for the sheet from the heat roller when an image forming side detected by the scanner does not face the heat roller to be greater than a quantity of heat provided for the sheet from the heat roller when the image forming side faces the heat roller.Type: ApplicationFiled: February 5, 2010Publication date: August 5, 2010Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHAInventors: Hiroyuki TAGUCHI, Ken IGUCHI, Minoru YOSHIDA, Osamu TAKAGI, Takahito KABAI, Yoshiaki KANEKO
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Patent number: 7643325Abstract: A nonvolatile decision memory unit stores decision data indicating whether data stored in the normal memory cells is true or false. An inversion control circuit sets the inverting signal to a valid level with a predetermined probability. A write circuit writes data having logic which is inverse logic of data to be rewritten to the normal memory cells and writes decision data indicating false to the decision memory unit when the inverting signal indicates a valid level. Since inverse data is rewritten at a predetermined frequency, an imprint is prevented when a read operation is executed repetitively. Moreover, since frequent repeating of reverse polarization of the ferroelectric capacitor due to a rewrite operation is prevented, deterioration of the ferroelectric capacitor due to reverse polarization is minimized. Thus, occurrence of the imprint and deterioration of characteristics in the ferroelectric capacitor is prevented, and the reliability of the ferroelectric memory is improved.Type: GrantFiled: August 31, 2007Date of Patent: January 5, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Shingo Hagiwara, Yoshiaki Kaneko, Amane Inoue, Akihito Kumagai, Isao Fukushi
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Publication number: 20090095619Abstract: A gas treating method including: generating non-equilibrium plasma in a gas flow space; and treating a gas to be treated containing a substance to be treated using the non-equilibrium plasma, the non-equilibrium plasma being generated by using at least two wire-like high-voltage applying electrodes that are arranged away from each other, in between at least two flat-plate ground electrodes that are arranged face to face in parallel to each other to define the gas flow space, in a direction perpendicular to opposite sides of the flat-plate ground electrodes.Type: ApplicationFiled: December 11, 2008Publication date: April 16, 2009Applicant: CANON KABUSHIKI KAISHAInventors: Junichi Tamura, Yoshiaki Kaneko, Toshiji Nishiguchi
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Publication number: 20080175034Abstract: A nonvolatile decision memory unit stores decision data indicating whether data stored in the normal memory cells is true or false. An inversion control circuit sets the inverting signal to a valid level with a predetermined probability. A write circuit writes data having logic which is inverse logic of data to be rewritten to the normal memory cells and writes decision data indicating false to the decision memory unit when the inverting signal indicates a valid level. Since inverse data is rewritten at a predetermined frequency, an imprint is prevented when a read operation is executed repetitively. Moreover, since frequent repeating of reverse polarization of the ferroelectric capacitor due to a rewrite operation is prevented, deterioration of the ferroelectric capacitor due to reverse polarization is minimized. Thus, occurrence of the imprint and deterioration of characteristics in the ferroelectric capacitor is prevented, and the reliability of the ferroelectric memory is improved.Type: ApplicationFiled: August 31, 2007Publication date: July 24, 2008Inventors: Shingo Hagiwara, Yoshiaki Kaneko, Amane Inoue, Akihito Kumagai, Isao Fukushi
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Publication number: 20070053805Abstract: A gas decomposition apparatus including at least a set of a high-voltage electrode and a ground electrode, an electric power supply for applying a voltage between the high-voltage electrode and the ground electrode to induce a plasma discharge therebetween, a dielectric substance, and a plasma processing unit. The dielectric substance is disposed between the high-voltage electrode and the ground electrode, and is capable of allowing a gas to be decomposed to flow therethrough. The high-voltage electrode, the ground electrode, and the dielectric substance are disposed in the plasma processing unit. At least one of the high-voltage electrode and the ground electrode is composed of an elastic conductive material and is capable of matching a surface profile of the dielectric substance.Type: ApplicationFiled: August 31, 2006Publication date: March 8, 2007Applicant: CANON KABUSHIKI KAISHAInventors: Yoshiaki Kaneko, Toshiji Nishiguchi, Hideo Iwama, Junichi Tamura
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Publication number: 20060119278Abstract: There is provided a gas decomposition apparatus including: at least a pair of electrodes, each of which are formed of metal electrodes each covered with a dielectric substance, for inducing glow discharge under application of a high voltage; a dielectric substance formed into a shape which allows a gas to be decomposed to flow in the dielectric substance and provided between the pair of electrodes; and a plasma reactor provided therein with the pair of electrodes and the dielectric substance. A gap is formed between at least one electrode of the pair of electrodes and the dielectric substance, and the dielectric substance is arranged in the plasma reactor such that a substantially total volume of the gas to be decomposed flows in the dielectric substance. Such a constitution allows formation of a uniform and high-density electric field and gas treatment at a high decomposition efficiency.Type: ApplicationFiled: December 1, 2005Publication date: June 8, 2006Applicant: Canon Kabushiki KaishaInventors: Yoshiaki Kaneko, Junichi Tamura, Kenichiro Iuchi
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Publication number: 20060115390Abstract: Provided is a plasma discharge reactor including a ground electrode, a high-voltage applying electrode coated with a barrier material, a dielectric member having a three-dimensional network structure comprising a dielectric which is coated with an adsorbent for adsorbing a treating substance contained in a subject gas, and a containing space positioned between the ground electrode and the high-voltage applying electrode, for containing the dielectric member therein. The subject gas is plasma-treated within the dielectric member in the containing space. The dielectric member is in contact with the ground electrode at a contact portion, and the dielectric is exposed at the contact portion. Thereby, generation of a spark discharge between an electrode and a dielectric can be prevented, and an active current other than discharge can also be suppressed.Type: ApplicationFiled: September 28, 2005Publication date: June 1, 2006Applicant: CANON KABUSHIKI KAISHAInventors: Junichi Tamura, Yoshiaki Kaneko, Kenichiro Iuchi
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Patent number: 7003680Abstract: An information processing apparatus receives a carrier wave modulated in accordance with information and extracts the information and power therefrom to execute a given process. A receiving circuit receives the carrier wave. A dc power generating circuit rectifies the carrier wave received by the receiving circuit to thereby generate dc power. A demodulation circuit is structurally independent of the dc power generating circuit, and retrieves the information modulated onto the carrier wave. An information processing circuit is supplied with the dc power as a power source, and processes the information retrieved by the demodulation circuit in a given manner. Since the demodulation circuit and the dc power generating circuit are structurally independent of each other, interference between elements included in these circuits can be eliminated and simple designing is enabled. In addition, power consumed in the apparatus can be reduced because of optimal designing.Type: GrantFiled: February 1, 2002Date of Patent: February 21, 2006Assignee: Fujitsu LimitedInventors: Shoichi Masui, Yoshiaki Kaneko
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Publication number: 20050274599Abstract: Provided is a gas treating method, including: generating non-equilibrium plasma in a gas flow space; and treating a gas to be treated containing a substance to be treated using the non-equilibrium plasma, the non-equilibrium plasma being generated by using at least two wire-like high-voltage applying electrodes that are arranged away from each other, in between at least two flat-plate ground electrodes that are arranged face to face in parallel to each other to define the gas flow space, in a direction perpendicular to opposite sides of the flat-plate ground electrodes.Type: ApplicationFiled: June 10, 2005Publication date: December 15, 2005Applicant: Canon Kabushiki KaishaInventors: Junichi Tamura, Yoshiaki Kaneko, Toshiji Nishiguchi
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Publication number: 20050214181Abstract: A plasma generator for producing plasma under normal pressure by applying a voltage between a ground electrode and a high-voltage electrode, the plasma generator including the ground electrode, the high-voltage electrode, and a dielectric member arranged between the ground electrode and the high-voltage electrode, in which the dielectric member has a structure including a porous ceramic substrate covered with an inorganic dielectric substance.Type: ApplicationFiled: March 23, 2005Publication date: September 29, 2005Applicant: CANON KABUSHIKI KAISHAInventors: Yoshiaki Kaneko, Toshiji Nishiguchi
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Publication number: 20020108066Abstract: An information processing apparatus receives a carrier wave modulated in accordance with information and extracts the information and power therefrom to execute a given process. A receiving circuit receives the carrier wave. A dc power generating circuit rectifies the carrier wave received by the receiving circuit to thereby generate dc power. A demodulation circuit is structurally independent of the dc power generating circuit, and retrieves the information modulated onto the carrier wave. An information processing circuit is supplied with the dc power as a power source, and processes the information retrieved by the demodulation circuit in a given manner. Since the demodulation circuit and the dc power generating circuit are structurally independent of each other, interference between elements included in these circuits can be eliminated and simple designing is enabled. In addition, power consumed in the apparatus can be reduced because of optimal designing.Type: ApplicationFiled: February 1, 2002Publication date: August 8, 2002Applicant: FUJITSU LIMITEDInventors: Shoichi Masui, Yoshiaki Kaneko
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Patent number: 6249188Abstract: Provided are a phase comparator (BBD) 10 for generating a pulse of a signal UP0 or DOWN0 depending on lead or lag of the falling edge of a clock recovered from DATA, relative to the edge of DATA, an overrun detector circuit 20 activating an overrun signal OVR while the circuit 20 detects that lead or lag of the falling edge of the clock exceeds &pgr;/2, a state latch circuit 30 latching a state of either a signal UP0 or DOWN0 being active before the signal OVR transits active, and a selection circuit 40 outputting the signals UP0 and DOWN0 as signals UP and DOWN while the signal OVR is inactive, and outputting the signals UP0 and DOWN0 as the signals DOWN and UP while the signal OVR is active.Type: GrantFiled: March 20, 2000Date of Patent: June 19, 2001Assignee: Fijitsu Quantum Devices LimitedInventor: Yoshiaki Kaneko
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Patent number: 5942773Abstract: A field effect transistor with a reduced delay variation is provided in a compound semiconductor layer with a channel, a source, and a drain region of a first conduction type. A gate electrode, a source electrode, and a drain electrode are formed respectively on the regions mentioned above. Particularly the gate electrode formed on the channel is provided with a projecting part extended in a direction crossing the direction of opposition of the source and drain region and caused to protrude from the channel region. In the compound semiconductor layer, a well region of a second conduction type opposite to the first conduction type is formed so as to enclose the channel region, the source region, the drain region, and the projecting part of the gate electrode more deeply than in the channel, source, and drain regions. The delay variation is markedly reduced by the fact that the gate electrode including the projecting part is enclosed with the well region of the second conduction type.Type: GrantFiled: December 23, 1996Date of Patent: August 24, 1999Assignee: Fujitsu LimitedInventor: Yoshiaki Kaneko
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Patent number: 5352943Abstract: A compound semiconductor integrated circuit is adapted to provide an interface with respect to an internal circuit which is driven by first and second power source voltages and operates responsive to a logic signal having a predetermined logic level which is different from an emitter-coupled logic level. The compound semiconductor integrated circuit includes an input circuit part which is driven by the first and third power source voltages and receives an input logic signal having the emitter-coupled logic level, and an output circuit part which is driven by the first and second power source voltages and converts an output signal of the input circuit part into a signal having the predetermined logic level. The second power source voltage is lower than the first power source voltage. The third power source voltage is different from the second power source voltage and is lower than the first power source voltage. The output circuit part supplies an output thereof to the internal circuit.Type: GrantFiled: February 4, 1993Date of Patent: October 4, 1994Assignees: Fujitsu Limited, Fujitsu Quantum Devices LimitedInventors: Kazuhisa Tsukahara, Yoshiaki Kaneko, Maya Koyanagi
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Patent number: 5159208Abstract: An interface circuit provided between a compound semiconductor logic circuit and a bipolar transistor circuit includes an input buffer part for receiving an input signal from the GaAs logic circuit and for outputting a buffered input signal, and an output driver circuit for generating a drive signal from the buffered input signal. The interface circuit also includes an output transistor having a gate connectable to receive the drive signal, a first terminal connectable to receive a first power supply voltage, and a second terminal, and an output terminal connected to the second terminal of the output transistor and the bipolar transistor circuit.Type: GrantFiled: March 8, 1991Date of Patent: October 27, 1992Assignee: Fujitsu LimitedInventor: Yoshiaki Kaneko
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Patent number: 4903257Abstract: A digital two-way radio communication system including first and second radio stations. Each radio station includes an antenna, a data transmission unit, a data reception unit, and a switching circuit. Both radio stations are radio-connected by a single frequency. When a first data transmission unit transmits data to the second radio station, a first switching circuit in the first radio station forms a transmission path between the first data transmission unit and a first antenna, and a second switching circuit in the second radio station forms a reception path between a second antenna and a second data reception unit in the second radio station, or vice versa.Type: GrantFiled: May 27, 1988Date of Patent: February 20, 1990Assignee: Fujitsu LimitedInventors: Yukio Takeda, Takeshi Takano, Yoshiaki Kaneko, Akihiko Kimura, Takaharu Nakamura
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Patent number: 4796155Abstract: A liquid cooling type high frequency solid state device comprising: a solid state chip; at least one matching circuit connected to the solid state chip; a carrier for mounting the solid state chip and the matching circuit, constituting a solid state circuit to be cooled; a coolant vessel for containing a liquid coolant, with a space for coolant vapor at the top thereof; and an element for condensing the coolant vapor contained in the top space of the vessel. At least a part of the solid state circuit contacts the liquid coolant for boiling and evaporating the coolant. Amplitude modulation of the solid state circuit due to the boiling of the coolant is prevented.Type: GrantFiled: August 20, 1987Date of Patent: January 3, 1989Assignee: Fujitsu LimitedInventors: Toshiyuki Saito, Naofumi Okubo, Yoshiaki Kaneko, Yasuyuki Tokumitsu
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Patent number: 4686494Abstract: A cavity resonator coupling type power distributor/power combiner can be used as a distributing amplifier or a combining unit. A first cavity resonator, having a single coupling terminal, and a second cavity resonator having a plurality of coupling terminals, are coupled by a coupling window or a coupling rod. As a result, a wide bandwidth of microwave electric power can be distributed or combined.Type: GrantFiled: January 18, 1984Date of Patent: August 11, 1987Assignee: Fujitsu LimitedInventors: Yoshiaki Kaneko, Toshiyuki Saito, Naofumi Okubo