Patents by Inventor Yoshiaki Nakazaki

Yoshiaki Nakazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220387325
    Abstract: The present invention provides a method for manufacturing a dispersion in which a substance, which is poorly soluble in a dispersion medium, is dispersed with a particle size of a nano-order level. More particularly, the method includes: preparing a solution containing a good solvent and the poorly soluble substance and the surfactant dissolved in the good solvent; rapidly cooling the solution to a temperature at which the poorly soluble substance precipitates in the solution at a temperature lowering rate of 100 to 4,000° C./second to produce ultrafine particles with a particle size of a nano-order level formed of the poorly soluble substance in the good solvent; and (i) separating the good solvent from a mixed solution of the solution and the dispersion medium after mixing the solution and the dispersion medium, or (ii) mixing the dispersion medium to the solution after separating the good solvent from the solution.
    Type: Application
    Filed: October 16, 2019
    Publication date: December 8, 2022
    Applicants: NANO CUBE JAPAN CO., LTD., CBC CO., LTD.
    Inventors: Yoshiaki NAKAZAKI, Takafumi OTOYAMA, Shinya MIYAIRI
  • Publication number: 20160204139
    Abstract: A thin film transistor substrate includes: a gate electrode and a first electrode of a capacitor formed above a substrate so as to be arranged along a plane of the substrate; a gate insulating film formed on the gate electrode; a semiconductor layer formed on the gate insulating film; an insulating layer formed on the semiconductor layer and above the first electrode so as to expose portions of the semiconductor layer; a source electrode and a drain electrode formed above the insulating layer so as to be connected to the semiconductor layer at the exposed portions of the semiconductor layer; and a second electrode of the capacitor formed above the insulating layer, at a position opposite the first electrode, and the insulating layer above the gate electrode is thicker than the insulating layer above the first electrode.
    Type: Application
    Filed: May 27, 2014
    Publication date: July 14, 2016
    Applicant: JOLED INC.
    Inventors: Yuji KISHIDA, Takahiro KAWASHIMA, Yoshiaki NAKAZAKI
  • Publication number: 20160118244
    Abstract: A thin-film transistor includes: a gate electrode; a source electrode; a drain electrode; a channel layer that is in contact with the source electrode and the drain electrode, and includes oxide semiconductor; and a gate insulating layer that is disposed between the gate electrode and the channel layer, and is in contact with the gate electrode and the channel layer, wherein a region of the gate insulating layer that is in contact with the channel layer is a silicon compound film, and the silicon compound film contains silicon, nitrogen, and oxygen, and is formed by performing plasma processing for introducing, into a film containing silicon and one of nitrogen and oxygen, the other of nitrogen and oxygen.
    Type: Application
    Filed: February 27, 2014
    Publication date: April 28, 2016
    Applicant: JOLED INC.
    Inventors: Hiroshi HAYASHI, Yoshiaki NAKAZAKI, Yuji KISHIDA
  • Patent number: 8085355
    Abstract: A structure of a plurality of thin film transistors wherein a peripheral circuit on a glass substrate of a liquid crystal display panel; and each of polycrystalline silicon thin film 13 of the thin film transistor is formed on the glass substrate; and each of gate electrode 15 is formed on a gate insulation layer, and each of the gate electrode 15 is overhead corresponding to the polycrystalline silicon thin film 13 for a channel; wherein the gate electrode 15 is comprised a pair of projection part 15A and a gate-channel 15B; and wherein the pair of projection part 15A is formed the both sides of the gate-channel 15B in which the side is for along the channel-direction, and wherein the pair of projection part 15A is enlarged for across the channel-direction.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: December 27, 2011
    Assignee: Toshiba Mobile Display Co., Ltd.
    Inventors: Hajime Watakabe, Masato Hiramatsu, Toshiya Kiyota, Mikio Murata, Masaki Kado, Arichika Ishida, Yoshiaki Nakazaki
  • Patent number: 7742015
    Abstract: In order to prevent a gradation shift due to variations in the thickness of a film used to form an auxiliary capacitor, a detection capacitor having a layer structure similar to that of the auxiliary capacitor placed for each pixel is provided on an array substrate. Furthermore, the capacitor value of the detection capacitor as a representative of the plurality of auxiliary capacitors is detected, and the potential amplitude ?Vcs of a power supply line connected to the auxiliary capacitor is adjusted based on this detected value.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: June 22, 2010
    Assignee: Toshiba Matsushita Display Technology Co., Ltd.
    Inventors: Masahiro Tada, Yoshiaki Nakazaki, Akihiko Saitoh, Hiroyuki Kimura, Shinichi Hirota
  • Publication number: 20100110322
    Abstract: A structure of a plurality of thin film transistors wherein a peripheral circuit on a glass substrate of a liquid crystal display panel; and each of polycrystalline silicon thin film 13 of the thin film transistor is formed on the glass substrate; and each of gate electrode 15 is formed on a gate insulation layer, and each of the gate electrode 15 is overhead corresponding to the polycrystalline silicon thin film 13 for a channel; wherein the gate electrode 15 is comprised a pair of projection part 15A and a gate-channel 15B; and wherein the pair of projection part 15A is formed the both sides of the gate-channel 15B in which the side is for along the channel-direction, and wherein the pair of projection part 15A is enlarged for across the channel-direction.
    Type: Application
    Filed: August 25, 2009
    Publication date: May 6, 2010
    Inventors: Hajime WATAKABE, Masato Hiramatsu, Toshiya Kiyota, Mikio Murata, Masaki Kado, Arichika Ishida, Yoshiaki Nakazaki
  • Patent number: 7485505
    Abstract: The present invention provides a thin-film transistor offering a higher electron (or hole) mobility, a method for manufacturing the thin-film transistor, and a display using the thin-film transistor. The present invention provides a thin-film transistor having a source region, a channel region, and a drain region in a semiconductor thin film with a crystal grown in a horizontal direction, the thin-film transistor having a gate insulating film and a gate electrode over the channel region, wherein a drain edge of the drain region which is adjacent to the channel region is formed in the vicinity of a crystal growth end position.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: February 3, 2009
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yoshiaki Nakazaki, Genshiro Kawachi, Terunori Warabisako, Masakiyo Matsumura
  • Patent number: 7335910
    Abstract: An object of the present invention is to provide a thin film transistor having a high mobility and having fewer fluctuations in the mobility or threshold voltage characteristics. A non-single-crystal semiconductor thin film having a thickness of less than 50 nm and disposed on an insulating substrate is irradiated with laser light having an inverse-peak-patterned light intensity distribution to grow crystals unidirectionally in a lateral direction. Thus, band-like crystal grains having a dimension in a crystal growth direction, which is longer than a width, are arranged adjacent to each other in a width direction to form a crystal grain array. A source region and a drain region of a TFT are formed so that a current flows in the crystal growth direction in an area including a plurality of crystal grains of this crystal grain array.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: February 26, 2008
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Tomoya Kato, Masakiyo Matsumura, Yoshiaki Nakazaki
  • Publication number: 20080044975
    Abstract: The present invention provides a thin-film transistor offering a higher electron (or hole) mobility, a method for manufacturing the thin-film transistor, and a display using the thin-film transistor. The present invention provides a thin-film transistor having a source region, a channel region, and a drain region in a semiconductor thin film with a crystal grown in a horizontal direction, the thin-film transistor having a gate insulating film and a gate electrode over the channel region, wherein a drain edge of the drain region which is adjacent to the channel region is formed in the vicinity of a crystal growth end position.
    Type: Application
    Filed: September 14, 2007
    Publication date: February 21, 2008
    Inventors: Yoshiaki NAKAZAKI, Genshiro Kawachi, Terunori Warabisako, Masakiyo Matsumura
  • Patent number: 7309900
    Abstract: There is provided a thin-film transistor that is formed on an insulating substrate, is capable of a high-speed operation, has small non-uniformity among devices, is hardly susceptible to device destruction due to high voltage, and is free from the effect of a parasitic transistor that forms at an edge part of an Si island. The thin-film semiconductor device is formed using a thin-film semiconductor provided on the insulating substrate and includes a gate region for formation of a channel region through which a drain current flows. The gate region has a ring shape in plan on the insulating substrate. High concentration impurity-doped regions are dividedly provided on an inside and an outside of the ring-shaped gate region, and the channel region is formed of a plurality of fan-shaped semiconductor single-crystal portions.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: December 18, 2007
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Fumiki Nakano, Genshiro Kawachi, Yoshiaki Nakazaki, Shinzo Tsuboi, Takahiko Endo, Tomoya Kato
  • Patent number: 7288787
    Abstract: The present invention provides a thin-film transistor offering a higher electron (or hole) mobility, a method for manufacturing the thin-film transistor, and a display using the thin-film transistor. The present invention provides a thin-film transistor having a source region, a channel region, and a drain region in a semiconductor thin film with a crystal grown in a horizontal direction, the thin-film transistor having a gate insulating film and a gate electrode over the channel region, wherein a drain edge of the drain region which is adjacent to the channel region is formed in the vicinity of a crystal growth end position.
    Type: Grant
    Filed: July 3, 2006
    Date of Patent: October 30, 2007
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yoshiaki Nakazaki, Genshiro Kawachi, Terunori Warabisako, Masakiyo Matsumura
  • Publication number: 20070228469
    Abstract: There is provided a thin-film transistor that is formed on an insulating substrate, is capable of a high-speed operation, has small non-uniformity among devices, is hardly susceptible to device destruction due to high voltage, and is free from the effect of a parasitic transistor that forms at an edge part of an Si island. The thin-film semiconductor device is formed using a thin-film semiconductor provided on the insulating substrate and includes a gate region for formation of a channel region through which a drain current flows. The gate region has a ring shape in plan on the insulating substrate. High concentration impurity-doped regions are dividedly provided on an inside and an outside of the ring-shaped gate region, and the channel region is formed of a plurality of fan-shaped semiconductor single-crystal portions.
    Type: Application
    Filed: June 5, 2007
    Publication date: October 4, 2007
    Inventors: Fumiki Nakano, Genshiro Kawachi, Yoshiaki Nakazaki, Shinzo Tsuboi, Takahiko Endo, Tomoya Kato
  • Publication number: 20070091039
    Abstract: In order to prevent a gradation shift due to variations in the thickness of a film used to form an auxiliary capacitance, a detection capacitance having a layer structure similar to that of the auxiliary capacitance placed for each pixel is provided on an array substrate. Furthermore, the capacitance value of the detection capacitance as a representative of the plurality of auxiliary capacitances is detected, and the potential amplitude ?Vcs of a power supply line connected to the auxiliary capacitance is adjusted based on this detected value.
    Type: Application
    Filed: October 10, 2006
    Publication date: April 26, 2007
    Applicant: Toshiba Matsushita Display Technology Co., Ltd.
    Inventors: Masahiro Tada, Yoshiaki Nakazaki, Akihiko Saitoh, Hiroyuki Kimura, Shinichi Hirota
  • Publication number: 20070063228
    Abstract: An object of the present invention is to provide a thin film transistor having a high mobility and having fewer fluctuations in the mobility or threshold voltage characteristics. A non-single-crystal semiconductor thin film having a thickness of less than 50 nm and disposed on an insulating substrate is irradiated with laser light having an inverse-peak-patterned light intensity distribution to grow crystals unidirectionally in a lateral direction. Thus, band-like crystal grains having a dimension in a crystal growth direction, which is longer than a width, are arranged adjacent to each other in a width direction to form a crystal grain array. A source region and a drain region of a TFT are formed so that a current flows in the crystal growth direction in an area including a plurality of crystal grains of this crystal grain array.
    Type: Application
    Filed: May 12, 2006
    Publication date: March 22, 2007
    Inventors: Tomoya Kato, Masakiyo Matsumura, Yoshiaki Nakazaki
  • Publication number: 20070026619
    Abstract: The present invention provides a thin-film transistor offering a higher electron (or hole) mobility, a method for manufacturing the thin-film transistor, and a display using the thin-film transistor. The present invention provides a thin-film transistor having a source region, a channel region, and a drain region in a semiconductor thin film with a crystal grown in a horizontal direction, the thin-film transistor having a gate insulating film and a gate electrode over the channel region, wherein a drain edge of the drain region which is adjacent to the channel region is formed in the vicinity of a crystal growth end position.
    Type: Application
    Filed: July 3, 2006
    Publication date: February 1, 2007
    Inventors: Yoshiaki NAKAZAKI, Genshiro KAWACHI, Terunori WARABISAKO, Masakiyo MATSUMURA
  • Publication number: 20070023757
    Abstract: The present invention provides a thin-film transistor having a higher mobility for electrons or holes, a method for manufacturing the thin-film transistor, and a display using the thin-film transistor. Thus, the present invention provides a thin-film transistor having a source region, a channel region, and a drain region in a semiconductor thin film having a crystallization region with a crystal grown in a horizontal direction, the thin-film transistor having a gate insulating film and a gate electrode over the channel region, wherein a drain edge of the drain region which is adjacent to the channel region is formed in the vicinity of a crystal growth end position.
    Type: Application
    Filed: July 3, 2006
    Publication date: February 1, 2007
    Inventors: Yoshiaki Nakazaki, Genshiro Kawachi, Terunori Warabisako, Masakiyo Matsumura
  • Publication number: 20070001949
    Abstract: An input-output (I/O) protective circuit having more stable I/O protective function for use in the liquid crystal display device and including in one embodiment a resistance provided between an I/O terminal pad and an I/O primary stage thin film transistor, a wiring connecting the I/O terminal pad with the resistance, and two I/O protective thin film transistors connected in series between a ground terminal and a power source terminal. The above wiring is connected with each joint portion of the two I/O protective thin film transistors and, each of the two I/O protective thin film transistors has p-type substrate potential fixing terminals and n-type substrate potential fixing terminals, which are connected with each of the channel layers of the I/O protective thin film transistors, and p-type substrate potential fixing terminals and n-type substrate potential fixing terminals are connected with the ground terminals.
    Type: Application
    Filed: September 1, 2006
    Publication date: January 4, 2007
    Inventor: Yoshiaki Nakazaki
  • Patent number: 7138987
    Abstract: There is provided an input-output (I/O) protective circuit having more stable I/O protective function for use in the liquid crystal display device. An IO protective circuit includes: a resistance 13 provided between an I/O terminal pad 11 and an I/O primary stage thin film transistor 12, a wiring connecting the I/O terminal pad 11 with the resistance 13, and two I/O protective thin film transistors 14 connected in series between a ground terminal 20 and a power source terminal 21.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: November 21, 2006
    Assignee: Kabushiki Kaisha Ekisho Sentan Gijutsu Kaihatsu Center
    Inventor: Yoshiaki Nakazaki
  • Publication number: 20060033104
    Abstract: There is disclosed a thin film transistor having a source region, a channel region, and a drain region in a semiconductor thin film whose crystals have grown in a transverse direction, the thin film transistor having a gate insulating film and a gate electrode in an upper part of the channel region, wherein a channel-region-side edge portion of the drain region or the source region is disposed in such a manner as to be positioned in the vicinity of an end position of lateral growth.
    Type: Application
    Filed: August 5, 2005
    Publication date: February 16, 2006
    Applicant: Advanced LCD Technologies Dev. Ctr. Co., Ltd.
    Inventors: Yoshiaki Nakazaki, Fumiki Nakano, Genshiro Kawachi, Terunori Warabisako, Masayuki Jyumonji, Hiroyuki Ogawa, Masato Hiramatsu, Tomoya Kato
  • Publication number: 20060006467
    Abstract: A TFT structure and a circuit configuration, which are suitable, for example, for input/output protection of a liquid crystal display device, are provided. According to an embodiment of the invention, there is provided a TFT that includes a source region, a channel region and a drain region, which are formed in a Si thin film, and a gate insulation film and a gate electrode, which are formed over the channel region. A central portion and a source-side end portion of the channel region are formed of a substantially single-crystal semiconductor, and a drain-side end portion of the channel region is formed of a polycrystalline or amorphous semiconductor. The TFT is used in a protection circuit section, thereby enabling absorption of a surge voltage in the protection circuit section.
    Type: Application
    Filed: June 20, 2005
    Publication date: January 12, 2006
    Inventor: Yoshiaki Nakazaki