Patents by Inventor Yoshiaki Shimizu

Yoshiaki Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120050416
    Abstract: A tube support member that puts a tube connected to an ink jet head and an ink tank in a bent state is provided. Accordingly, when a pulling force acts between the bent support member and the tube, a component force acting as contact force occurs at the surface that makes contact with the tube, and a high degree of friction is generated in response to this component force. The tube is thus strongly supported in a state in which the tube does not shift with the dimensions of the tube changing. Meanwhile, when the pulling force is released, the component force is also eliminated, and the tube is freed; the dimensions of the tube return to normal, and the tension is eliminated.
    Type: Application
    Filed: April 5, 2011
    Publication date: March 1, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Taku ISHIZAWA, Yoshiaki SHIMIZU
  • Publication number: 20120038719
    Abstract: A liquid container for supplying a liquid to a liquid ejection apparatus comprises: a liquid chamber provided to store the liquid; an air chamber connected with the liquid chamber to introduce the outside air into the liquid chamber with consumption of the liquid in the liquid chamber; an open-air hole provided to introduce the outside air into the air chamber; and a liquid inlet provided to fill the liquid into the liquid chamber, wherein the liquid inlet is located at a lower position than the open-air hole, in a filling attitude of the liquid container in which the liquid is filled into the liquid chamber.
    Type: Application
    Filed: August 18, 2011
    Publication date: February 16, 2012
    Inventors: Yoshiaki Shimizu, Taku Ishizawa, Yuki Takeda, Syuichi Koganehira
  • Publication number: 20120013687
    Abstract: A liquid accommodating container in which in a use position, a port opened to the air is provided at a position that is closer to an air chamber uppermost surface and is included in a first corner portion, an air-side opening is provided at a position that is closer to an air chamber lowermost surface and is included in a second corner portion which is at a diagonal position to the first corner portion, and a liquid-side opening is provided at a position satisfying the following conditions (a) and (b), (a) a position closer to a liquid chamber lowermost surface with respect to the vertical direction in the use position and (b) a position which is included in the second corner portion that is at a position equivalent to a diagonal position to the first corner portion.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 19, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Taku Ishizawa, Yoshiaki Shimizu, Yuki Takeda
  • Patent number: 8081392
    Abstract: The invention relates to a new mechanism for permitting a zoom lens to focus on a short distance subject by moving a focusing lens group in an amount that varies in an optical axis direction depending on a zooming position. The zoom lens comprises, in order from its object side, a positive first lens group, a negative second lens group and a positive third lens group. Zooming is implemented while the space between adjoining lens groups is varied, and focusing on a short distance subject is implemented by moving the negative second lens group in an amount that varies in the optical axis direction depending on a zooming position. The negative second lens group comprises a negative front unit G2F and a negative rear unit G2R. The space between the negative front unit G2F and the negative rear unit G2R is varied depending on a subject distance but that space remains constant wherever the zooming position lies.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: December 20, 2011
    Assignee: Olympus Imaging Corporation
    Inventors: Atsujiro Ishii, Yoshiaki Shimizu
  • Publication number: 20110214505
    Abstract: There is provided a semiconductor pressure sensor which improves the sensor sensitivity and is excellent in the withstand pressure characteristic and the temperature characteristic. In the semiconductor pressure sensor in which a diaphragm is formed by a cavity provided on one of top and bottom surfaces of a silicon substrate and a plurality of piezoresistors is disposed in the diaphragm edge, a recess which has a larger area than the planar shape of the diaphragm and whose entire edge is located outward from the diaphragm edge in plan view is provided in a protective film which covers the entire surface of the silicon substrate on the diaphragm side. The protective film located on the diaphragm is preferably formed of SiO2.
    Type: Application
    Filed: May 17, 2011
    Publication date: September 8, 2011
    Inventors: Daigo Aoki, Hideyuki Hashimoto, Tetsuya Kobayashi, Kunio Koizumi, Yoshiaki Shimizu, Yutaka Takashima, Shinya Yokoyama
  • Publication number: 20110156101
    Abstract: A semiconductor device may include a plurality of logic circuits connected to each other through input and output terminals thereof. The plurality of logic circuits comprising a first sub-plurality of logic circuits coupled to a first one of different power systems. The first sub-plurality of logic circuits is laid out and adjacent to each other in a first direction. The first sub-plurality of logic circuits includes a first logic circuit and a second logic circuit. The second logic circuit is adjacent to the first logic circuit. The first logic circuit includes a first element comprising a first diffusion layer. The second logic circuit includes a second element comprising the first diffusion layer.
    Type: Application
    Filed: December 27, 2010
    Publication date: June 30, 2011
    Applicant: Elpida Memory, Inc.
    Inventors: Yoshiaki Shimizu, Kazuhiko Matsuki
  • Patent number: 7876253
    Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: January 25, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Yoshiaki Shimizu, Hisao Suzuki, Kenji Ito, Masashi Kijima
  • Publication number: 20100309239
    Abstract: A printing apparatus includes a head which discharges color inks and into which clear ink that prevents the head from being clogged and white ink are selectively filled. A selection portion communicates either of a white or a clear ink container with the head. A controller executes a first switching from a second filled state where the head is filled with clear ink to a first filled state where the head is filled with white ink by shifting from a state where the clear ink container is communicated with the head to a state where the white ink container is communicated with the head. A second switching is executed from the first filled state to the second filled state by shifting from a state where the white ink container is communicated with the head to a state where the clear ink container is communicated with the head.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 9, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hidenori USUDA, Koji HARADA, Yoshiaki SHIMIZU, Toshio KUMAGAI, Shinji HIRATA
  • Patent number: 7842611
    Abstract: According to the present invention, on a double-sided substrate 1, a plurality of through-holes 2 connected to one wire 6 for plating as well as wiring are collectively arranged within a narrow range close to the connection portion. After a plating process, a penetrating hole 12 is formed and the connection potion is cut off. Thus, the wire 6 for plating and the collectively arranged through-holes 2 are made independent of one another so that no electric conduction occurs among the wire 6 for plating and the through-holes 2.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: November 30, 2010
    Assignee: Panasonic Corporation
    Inventor: Yoshiaki Shimizu
  • Publication number: 20100230734
    Abstract: A semiconductor device comprises a circuit cell and a basic end cell. The circuit cell includes a plurality of elements aligned in a first direction, and the basic end cell is arranged adjacent to the circuit cell in the first direction and has a compensation capacitor capable of being connected to a supply voltage of the circuit cell. In the semiconductor device, a diffusion layer forming the compensation capacitor extends along the first direction in a predetermined region of the circuit cell.
    Type: Application
    Filed: March 11, 2010
    Publication date: September 16, 2010
    Inventor: Yoshiaki SHIMIZU
  • Publication number: 20100225512
    Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.
    Type: Application
    Filed: May 21, 2010
    Publication date: September 9, 2010
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Yoshiaki SHIMIZU, Hisao SUZUKI, Kenji ITO, Masashi KIJIMA
  • Patent number: 7760125
    Abstract: An A/D conversion circuit including a plurality of resistor elements connected in series between a low-potential power supply and a high-potential power supply. The A/D conversion circuit includes a plurality of comparators that compare a reference voltage divided by each of the resistor elements with an analog input voltage, the comparators having a sample-and-hold function for holding a sampled analog input voltage. The plurality of comparators also include a high-order bit comparator and a low-order bit comparator having different sampling sources. The high-order bit comparator may be configured to compare the analog input voltage and one of the reference voltages to obtain a determination result. The low-order bit comparator may old the analog voltage from the time that the low-order bit comparator retrieves the analog input voltage until the low-order bit comparator performs comparison.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: July 20, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Yoshiaki Shimizu, Hisao Suzuki, Kenji Ito, Masashi Kijima
  • Publication number: 20100162769
    Abstract: Provided is an apparatus and method for manufacturing an optical fiber preform by supplying a high-frequency induction thermal plasma torch with at least glass raw material, dopant raw material, and oxygen, and depositing the glass particles synthesized in the plasma flame onto a surface of a glass rod that moves backward and forward relative to the plasma torch while rotating, wherein deposition of the glass particles is performed while cooling the glass rod. As a result, the concentration of fluorine doped in the cladding increase, thereby improving the relative refractive index of the preform.
    Type: Application
    Filed: December 24, 2009
    Publication date: July 1, 2010
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Tetsuya OTOSAKA, Yoshiaki SHIMIZU
  • Publication number: 20090268278
    Abstract: A dark color, resin sheet-like body having light reflective properties in a near-infrared region, the body comprising a surface layer (A) receiving solar radiation and a reflection layer (B). Surface layer (A) exhibits a dark color with a solar radiation absorption ratio of 90% or more in a wavelength region of 380 to 720 nm, a ratio of less than 30% in a near-infrared region of 720 to 1500 nm, and ratio of 50% or more in a near-infrared region of 720 to 1500 nm. Reflection layer (B) has a solar radiation reflection ratio of 85% or more in a wavelength region of 380 to 1500 nm. A ratio in a near-infrared region of 720 to 1500 nm of a sheet-like body formed by laminating surface layer (A) and reflection layer (B) is 70% or more.
    Type: Application
    Filed: May 31, 2007
    Publication date: October 29, 2009
    Applicant: ACHILLES CORPORATION
    Inventors: Takuo Suzuki, Yoshiaki Shimizu, Makiko Sakurazawa
  • Patent number: 7595960
    Abstract: A thin film magnetic head is provided. The thin film magnetic head includes a read head and a write head, a heating element, or the combination thereof. The heating element includes a heating conductor layer and a high-melting-point-material layer disposed so as to at least partially overlap the heating conductor layer. Electromigration in the heating conductor layer can be suppressed.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: September 29, 2009
    Assignee: TDK Corporation
    Inventors: Yoshiaki Shimizu, Akira Takahashi
  • Patent number: 7589578
    Abstract: A level shift circuit for sustaining the activation and inactivation response of a transistor with respect to an input signal in a preferable manner. The level shift circuit includes a shift circuit for converting an input signal having a first voltage to an output signal having a second voltage that is higher than the first voltage. The voltage generation circuit includes a control voltage generation circuit, for generating control voltage having a generally constant voltage level irrespective of the level of a power supply voltage, and a bias generation circuit. The bias generation circuit generates bias voltage so that the node voltage of the shift circuit is substantially equalized with the control voltage.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: September 15, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Yoshiaki Shimizu, Hisao Suzuki
  • Publication number: 20090213098
    Abstract: A liquid crystal display (LCD) device's microcontroller is used drive an LCD lamp ballast such that the scrolling effect from its light leakage may be reduced to a visually imperceptible level. A check may be performed of lamp's control status in order to verify the microcontroller's ability to properly and accurately control the lamp ballast. The microcontroller may then determine a frequency and duty cycle to use for the microcontroller's PWM control signal. Thereafter, the microcontroller may generate the PWM control signal in accordance with the determined frequency and duty cycle, and drive the lamp ballast using the control signal.
    Type: Application
    Filed: February 26, 2008
    Publication date: August 27, 2009
    Applicants: SONY CORPORATION, SONY ELECTRONICS INC.
    Inventors: Vincent Du, Marcelo Goto, Khoua Vang, Yoshiaki Shimizu
  • Publication number: 20090179305
    Abstract: According to the present invention, on a double-sided substrate 1, a plurality of through-holes 2 connected to one wire 6 for plating as well as wiring are collectively arranged within a narrow range close to the connection portion. After a plating process, a penetrating hole 12 is formed and the connection potion is cut off. Thus, the wire 6 for plating and the collectively arranged through-holes 2 are made independent of one another so that no electric conduction occurs among the wire 6 for plating and the through-holes 2.
    Type: Application
    Filed: December 24, 2008
    Publication date: July 16, 2009
    Applicant: Panasonic Corporation
    Inventor: Yoshiaki Shimizu
  • Publication number: 20090146301
    Abstract: A semiconductor device capable of realizing highly reliable three-dimensional mounting, and a method of manufacturing the same, are provided. A projected electrode 9 is formed in a region outside of an element mounting region of a substrate 5. The projected electrode 9 includes a protruding portion that protrudes from the front face of a molding resin portion 10. The distal end of the protruding portion is a flat face 13. In addition, a portion of the projected electrode 9 whose cross section is larger than the protruding portion is positioned inside the molding resin portion 10.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 11, 2009
    Applicant: Panasonic Corporation
    Inventors: Yoshiaki Shimizu, Yuichiro Yamada, Toshiyuki Fukuda
  • Patent number: 7543909
    Abstract: A wiper device of a liquid ejection apparatus includes a first wiper that wipes a nozzle surface defined in a liquid ejection head, a second wiper that wipes a side surface of the liquid ejection head extending in a direction intersecting the nozzle surface, and a drive mechanism that drives the first and second wipers to move between respective standby positions and wiping positions. The second wiper is formed separately from a cap that seals the nozzle surface of the liquid ejection head. The drive mechanism operates to move the second wiper to the corresponding wiping position independently from the first wiper. In this manner, independent wiping of the side surface of the liquid ejection head is performed when desired.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: June 9, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Yoshiaki Shimizu