Patents by Inventor Yoshiaki Shinjo
Yoshiaki Shinjo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9010615Abstract: To provide a bonding apparatus capable of increasing product quality by realizing high-precision control of a pressing force applied upon mounting of an electronic component on a substrate by bonding, and to a bonding method capable of providing high-quality products stably. The bonding apparatus includes: at least a bonding head 100 for pressing an electronic component 6 against a substrate 1 to bond it to the substrate 1; a plurality of load detection mechanisms (e.g., load sensors 5) substantially equally spaced so as to face one another under a substrate stage S supporting the substrate 1 provided with the electronic component 6; and a pressure detection unit 20 for detecting pressing force at the bonding surface between the electronic component 6 and substrate 1 on the basis of the pressure values detected by the individual load detection mechanisms 5.Type: GrantFiled: April 10, 2014Date of Patent: April 21, 2015Assignee: Fujitsu Semiconductor LimitedInventors: Kazuhiro Yoshimoto, Yuzo Shimobeppu, Kazuo Teshirogi, Yoshiaki Shinjo
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Publication number: 20140217153Abstract: To provide a bonding apparatus capable of increasing product quality by realizing high-precision control of a pressing force applied upon mounting of an electronic component on a substrate by bonding, and to a bonding method capable of providing high-quality products stably. The bonding apparatus includes: at least a bonding head 100 for pressing an electronic component 6 against a substrate 1 to bond it to the substrate 1; a plurality of load detection mechanisms (e.g., load sensors 5) substantially equally spaced so as to face one another under a substrate stage S supporting the substrate 1 provided with the electronic component 6; and a pressure detection unit 20 for detecting pressing force at the bonding surface between the electronic component 6 and substrate 1 on the basis of the pressure values detected by the individual load detection mechanisms 5.Type: ApplicationFiled: April 10, 2014Publication date: August 7, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Kazuhiro Yoshimoto, Yuzo Shimobeppu, Kazuo Teshirogi, Yoshiaki Shinjo
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Patent number: 8440545Abstract: A method of manufacturing a semiconductor device includes spraying fluid onto a surface of a treatment target substrate including a semiconductor substrate; forming a protection layer on the surface of the treatment target substrate after spraying the fluid; selectively removing the protection layer and a part of the treatment target substrate by an energy beam; and conducting removal processing on an area of the treatment target substrate from which the protection layer and the part of the treatment target substrate are selectively removed.Type: GrantFiled: November 18, 2008Date of Patent: May 14, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Hironori Fukaya, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Yoshiaki Shinjo, Kazuo Teshirogi, Mika Sakamoto
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Patent number: 8016973Abstract: A film bonding method of bonding a die bond film without causing any breakage. The die bond film is pressed against a wafer having a surface protective tape bonded thereto using a film-setting roller and a film-bonding roller, and a laser beam having a predetermined shape is irradiated to an area between the rollers. While rotationally moving the film-setting roller and the film-bonding roller, the laser beam is scanned on the wafer in accordance with their motion, and a portion of the die bond film, melted by the laser beam, is pressed against the wafer by the film-bonding roller following the film-setting roller to bond the die bond film to the wafer. Since the die bond film is bonded to the wafer by melting the same by the laser beam, even if the wafer is thin and reduced in its strength, it is possible to avoid the wafer from being damaged e.g. by thermal contraction of the surface protective tape.Type: GrantFiled: June 28, 2006Date of Patent: September 13, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Yoshiaki Shinjo, Yuzo Shimobeppu, Kazuo Teshirogi, Kazuhiro Yoshimoto
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Publication number: 20110011919Abstract: To provide a bonding apparatus capable of increasing product quality by realizing high-precision control of a pressing force applied upon mounting of an electronic component on a substrate by bonding, and to a bonding method capable of providing high-quality products stably. The bonding apparatus includes: at least a bonding head 100 for pressing an electronic component 6 against a substrate 1 to bond it to the substrate 1; a plurality of load detection mechanisms (e.g., load sensors 5) substantially equally spaced so as to face one another under a substrate stage S supporting the substrate 1 provided with the electronic component 6; and a pressure detection unit 20 for detecting pressing force at the bonding surface between the electronic component 6 and substrate 1 on the basis of the pressure values detected by the individual load detection mechanisms 5.Type: ApplicationFiled: September 23, 2010Publication date: January 20, 2011Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Kazuhiro Yoshimoto, Yuzo Shimobeppu, Kazuo Teshirogi, Yoshiaki Shinjo
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Patent number: 7857140Abstract: A semiconductor wafer storage case is disclosed that includes plural support members that are spaced at predetermined intervals with respect to each other and are each configured to come into contact with a peripheral edge region of a first face of a semiconductor wafer, and an elastic member that elastically supports the support members with respect to each other and is configured to elastically deform to come into contact with a second face of the semiconductor wafer and press the semiconductor wafer onto a corresponding support member.Type: GrantFiled: June 2, 2008Date of Patent: December 28, 2010Assignee: Fujitsu Semiconductor LimitedInventors: Yoshiaki Shinjo, Yuzo Shimobeppu, Kazuo Teshirogi, Kazuhiro Yoshimoto
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Patent number: 7820487Abstract: A manufacturing method of a semiconductor device includes providing an adhesive on a supporting board, the supporting board being where a semiconductor element is to be mounted; providing a member configured to block flow of the adhesive on a first main surface of the semiconductor element, the semiconductor element having a second main surface where an outside connection terminal is provided; mounting the semiconductor element on a part of the supporting board where the adhesive is provided by pressing the semiconductor element via the member.Type: GrantFiled: March 20, 2009Date of Patent: October 26, 2010Assignee: Fujitsu Semiconductor LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Yoshiaki Shinjo
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Patent number: 7655505Abstract: A manufacturing method of a semiconductor device, includes i) a step of providing a transparent member above a main surface of a semiconductor substrate where a plurality of semiconductor elements is formed; ii) a first dividing step of dividing the transparent member corresponding to a designated area of the semiconductor element; iii) a second dividing step of dividing the transparent member corresponding to an external configuration of the semiconductor element; and iv) a dividing step of dividing the semiconductor substrate into the semiconductor elements corresponding to a dividing position of the transparent member.Type: GrantFiled: May 22, 2006Date of Patent: February 2, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Yoshiaki Shinjo
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Publication number: 20090239355Abstract: A method of manufacturing a semiconductor device includes spraying fluid onto a surface of a treatment target substrate including a semiconductor substrate; forming a protection layer on the surface of the treatment target substrate after spraying the fluid; selectively removing the protection layer and a part of the treatment target substrate by an energy beam; and conducting removal processing on an area of the treatment target substrate from which the protection layer and the part of the treatment target substrate are selectively removed.Type: ApplicationFiled: November 18, 2008Publication date: September 24, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Hironori FUKAYA, Yuzo SHIMOBEPPU, Kazuhiro YOSHIMOTO, Yoshiaki SHINJO, Kazuo TESHIROGI, Mika SAKAMOTO
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Patent number: 7571538Abstract: The present invention relates to a Jig and method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: GrantFiled: March 10, 2005Date of Patent: August 11, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
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Publication number: 20090186451Abstract: A manufacturing method of a semiconductor device includes providing an adhesive on a supporting board, the supporting board being where a semiconductor element is to be mounted; providing a member configured to block flow of the adhesive on a first main surface of the semiconductor element, the semiconductor element having a second main surface where an outside connection terminal is provided; mounting the semiconductor element on a part of the supporting board where the adhesive is provided by pressing the semiconductor element via the member.Type: ApplicationFiled: March 20, 2009Publication date: July 23, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Kazuo TESHIROGI, Yuzo SHIMOBEPPU, Kazuhiro YOSHIMOTO, Yoshiaki SHINJO
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Patent number: 7563343Abstract: In a film lamination apparatus and method, there is no one-side contact of a pressing roller that presses a film to be laminated. The film is laminated using a rotatable pressing roller having a heater incorporated therein. The pressing roller is pressed onto the film placed on a semiconductor substrate while generating heat by the heater inside the pressing roller. The pressing roller is rolled on the film so as to laminate the film on the semiconductor substrate by partially heating the film by the pressing roller while moving the pressing roller.Type: GrantFiled: November 24, 2003Date of Patent: July 21, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Yoshiaki Shinjo
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Patent number: 7479627Abstract: A semiconductor device, includes a semiconductor substrate having a main surface where a light receiving element area is formed; a projection part provided in the periphery of the light receiving element area on the main surface of the semiconductor substrate; an adhesive material layer provided in the external periphery of the projection part on the main surface of the semiconductor substrate; and a transparent plate supported by the projection part and fixed above the light receiving element area by the adhesive material layer.Type: GrantFiled: April 24, 2006Date of Patent: January 20, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Kazuhiro Yoshimoto, Yuzo Shimobeppu, Kazuo Teshirogi, Yoshiaki Shinjo
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Patent number: 7432114Abstract: To provide a low-cost, efficient semiconductor device manufacturing method for connecting electrodes of a pair of bases (e.g., a pair of a semiconductor chip and a circuit board, or a pair of semiconductor chips) together in a short time. The method of the present invention includes: forming magnetic bumps 34 on at least one of first and second bases 10A and 40 to be bonded together at their corresponding electrodes (e.g., electrodes 15 and electrodes 41); aligning the electrodes 15 of the first base 10A to positions corresponding to the electrodes 41 of the second base 40 for connection, by means of magnetic forces of the magnetic bumps 34 formed over the first base 10A; and connecting the electrodes 15 of the first base 10A to the electrodes 41 of the second base 40, wherein the alignment is made for a plurality of the first bases 10A at a time.Type: GrantFiled: September 6, 2006Date of Patent: October 7, 2008Assignee: Fujitsu LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Yoshiaki Shinjo, Masataka Mizukoshi
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Publication number: 20080230438Abstract: A semiconductor wafer storage case is disclosed that includes plural support members that are spaced at predetermined intervals with respect to each other and are each configured to come into contact with a peripheral edge region of a first face of a semiconductor wafer, and an elastic member that elastically supports the support members with respect to each other and is configured to elastically deform to come into contact with a second face of the semiconductor wafer and press the semiconductor wafer onto a corresponding support member.Type: ApplicationFiled: June 2, 2008Publication date: September 25, 2008Applicant: FUJITSU LIMITEDInventors: Yoshiaki SHINJO, Yuzo SHIMOBEPPU, Kazuo TESHIROGI, Kazuhiro YOSHIMOTO
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Patent number: 7395847Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.Type: GrantFiled: March 10, 2005Date of Patent: July 8, 2008Assignee: Fujitsu LimitedInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
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Publication number: 20070231961Abstract: To provide a low-cost, efficient semiconductor device manufacturing method for connecting electrodes of a pair of bases (e.g., a pair of a semiconductor chip and a circuit board, or a pair of semiconductor chips) together in a short time. The method of the present invention includes: forming magnetic bumps 34 on at least one of first and second bases 10A and 40 to be bonded together at their corresponding electrodes (e.g., electrodes 15 and electrodes 41); aligning the electrodes 15 of the first base 10A to positions corresponding to the electrodes 41 of the second base 40 for connection, by means of magnetic forces of the magnetic bumps 34 formed over the first base 10A; and connecting the electrodes 15 of the first base 10A to the electrodes 41 of the second base 40, wherein the alignment is made for a plurality of the first bases 10A at a time.Type: ApplicationFiled: September 6, 2006Publication date: October 4, 2007Applicant: FUJITSU LIMITEDInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Yoshiaki Shinjo, Masataka Mizukoshi
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Publication number: 20070215673Abstract: To provide a bonding apparatus capable of increasing product quality by realizing high-precision control of a pressing force applied upon mounting of an electronic component on a substrate by bonding, and to a bonding method capable of providing high-quality products stably. The bonding apparatus includes: at least a bonding head 100 for pressing an electronic component 6 against a substrate 1 to bond it to the substrate 1; a plurality of load detection mechanisms (e.g., load sensors 5) substantially equally spaced so as to face one another under a substrate stage S supporting the substrate 1 provided with the electronic component 6; and a pressure detection unit 20 for detecting pressing force at the bonding surface between the electronic component 6 and substrate 1 on the basis of the pressure values detected by the individual load detection mechanisms 5.Type: ApplicationFiled: August 15, 2006Publication date: September 20, 2007Applicant: FUJITSU LIMITEDInventors: Kazuhiro Yoshimoto, Yuzo Shimobeppu, Kazuo Teshirogi, Yoshiaki Shinjo
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Publication number: 20070196954Abstract: A manufacturing method of a semiconductor device, includes i) a step of providing a transparent member above a main surface of a semiconductor substrate where a plurality of semiconductor elements is formed; ii) a first dividing step of dividing the transparent member corresponding to a designated area of the semiconductor element; iii) a second dividing step of dividing the transparent member corresponding to an external configuration of the semiconductor element; and iv) a dividing step of dividing the semiconductor substrate into the semiconductor elements corresponding to a dividing position of the transparent member.Type: ApplicationFiled: May 22, 2006Publication date: August 23, 2007Applicant: FUJITSU LIMITEDInventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Yoshiaki Shinjo
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Publication number: 20070196588Abstract: A film bonding method of bonding a die bond film without causing any breakage. The die bond film is pressed against a wafer having a surface protective tape bonded thereto using a film-setting roller and a film-bonding roller, and a laser beam having a predetermined shape is irradiated to an area between the rollers. While rotationally moving the film-setting roller and the film-bonding roller, the laser beam is scanned on the wafer in accordance with their motion, and a portion of the die bond film, melted by the laser beam, is pressed against the wafer by the film-bonding roller following the film-setting roller to bond the die bond film to the wafer. Since the die bond film is bonded to the wafer by melting the same by the laser beam, even if the wafer is thin and reduced in its strength, it is possible to avoid the wafer from being damaged e.g. by thermal contraction of the surface protective tape.Type: ApplicationFiled: June 28, 2006Publication date: August 23, 2007Applicant: FUJITSU LIMITEDInventors: Yoshiaki Shinjo, Yuzo Shimobeppu, Kazuo Teshirogi, Kazuhiro Yoshimoto