Patents by Inventor Yoshiaki Yamazaki

Yoshiaki Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240402994
    Abstract: An electronic device with a novel structure is provided. In an electronic device including a semiconductor device, the semiconductor device includes a CPU, an accelerator, and a memory device. The CPU includes a scan flip-flop circuit and a backup circuit electrically connected to the scan flip-flop circuit. The backup circuit includes a first transistor. The accelerator includes an arithmetic circuit and a data retention circuit electrically connected to the arithmetic circuit. The data retention circuit includes a second transistor. The memory device includes a memory cell including a third transistor. The first transistor to the third transistor each include a semiconductor layer containing a metal oxide in a channel formation region.
    Type: Application
    Filed: September 8, 2022
    Publication date: December 5, 2024
    Inventors: Kiyoshi KATO, Tatsuya ONUKI, Atsushi MIYAGUCHI, Yoshiaki OIKAWA, Shunpei YAMAZAKI
  • Publication number: 20240395974
    Abstract: A display apparatus with high display quality is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, a first insulating layer, and a filling layer. The first light-emitting device includes a first electrode, a first semiconductor layer over the first electrode, and a common electrode over the first semiconductor layer. The second light-emitting device includes a second electrode, a second semiconductor layer over the second electrode, and the common electrode over the second semiconductor layer. The first insulating layer includes a region in contact with the side surface of the first semiconductor layer and a region in contact with the side surface of the second semiconductor layer. The filling layer includes a region overlapping with the side surface of the first semiconductor layer with the first insulating layer therebetween and a region overlapping with the side surface of the second semiconductor layer with the first insulating layer therebetween.
    Type: Application
    Filed: September 16, 2022
    Publication date: November 28, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Koji KUSUNOKI, Yoshiaki OIKAWA
  • Publication number: 20240385456
    Abstract: A multifunctional display apparatus or electronic device is provided. An electronic device that can switch between VR display and AR display is provided. The electronic device includes a first display apparatus, a second display apparatus, a lens, a screen, a wearing tool, and a housing. The wearing tool has a function of fixing the housing to a head. The housing has a function of being transformed into a first mode that closes to block view and a second mode that opens to allow a front side to be viewed. The electronic device has a function of providing a first image displayed on the first display apparatus through the lens and the screen in the first mode, and a function of providing a second image projected to the screen from the second display apparatus in the second mode.
    Type: Application
    Filed: September 9, 2022
    Publication date: November 21, 2024
    Inventors: Shunpei YAMAZAKI, Yosuke TSUKAMOTO, Kiyoshi KATO, Tatsuya ONUKI, Yoshiaki OIKAWA, Kensuke YOSHIZUMI
  • Publication number: 20240383062
    Abstract: A relationship between an average current (IP-AVE) of a current non-suppression period (TIP) and an average current (IB-AVE) of a current suppression period (TIB) is set as 0.65?IP-AVE/(IP-AVE+IB-AVE)?0.90, a relationship between any current non-suppression period (TIP) and the current suppression period (TIB) immediately after is set as 0.30?TIB/(TIP+TIB)?0.60, a relationship between a forward feeding period (TP) and a reverse feeding period (TN) is set as 0.40?TN/(TP+TN)?0.70, a relationship between the current non-suppression period (TIP), the current suppression period (TIB), the forward feeding period (TP), and the reverse feeding period (TN) is set as {TN/(TP+TN)}>{TIB/(TIP+TIB)}, and the current non-suppression period (TIP) is controlled to account for ? or more of the forward feeding period (TP).
    Type: Application
    Filed: August 2, 2022
    Publication date: November 21, 2024
    Applicant: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)
    Inventors: Kei YAMAZAKI, Yoshiaki KITAMURA
  • Publication number: 20240387744
    Abstract: An object is to improve reliability of a light-emitting device. Alight-emitting device has a driver circuit portion including a transistor for a driver circuit and a pixel portion including a transistor for a pixel over one substrate. The transistor for the driver circuit and the transistor for the pixel are inverted staggered transistors each including an oxide semiconductor layer in contact with part of an oxide insulating layer. In the pixel portion, a color filter layer and a light-emitting element are provided over the oxide insulating layer. In the transistor for the driver circuit, a conductive layer overlapping with a gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed using metal conductive films.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Masayuki SAKAKURA, Yoshiaki OIKAWA, Kenichi OKAZAKI, Hotaka MARUYAMA
  • Publication number: 20240353899
    Abstract: A display device or an electronic device in which the number of components can be reduced can be provided. An electronic device in which a space in a housing can be effectively used can be provided. A display panel includes a first display portion positioned on the front surface of the housing, a second display portion and a third display portion that are provided along adjacent two of the side surfaces of the housing, and a first portion that is folded back to the rear side of the first display portion. When the display panel is developed, the first portion faces the first display portion with the second display portion provided therebetween. The first portion includes an external connection terminal or a driver circuit.
    Type: Application
    Filed: April 12, 2024
    Publication date: October 24, 2024
    Inventors: Shunpei YAMAZAKI, Yosuke TSUKAMOTO, Yoshiaki OIKAWA
  • Patent number: 12118467
    Abstract: A reduction in concentration due to a change in an emotion is inhibited. A change in an emotion of the human is suitably reduced. Part (in particular, an eye or an eye and its vicinity) or the whole of a user's face is detected, a feature of the user's face is extracted from data on the detected part or whole of the face, and an emotion of the user is estimated from the extracted feature of the face. In the case where the estimated emotion is an emotion that might reduce concentration, for example, a stimulus is applied to the sense of sight, the sense of hearing, the sense of touch, the sense of smell, or the like of the user to recover the concentration of the user.
    Type: Grant
    Filed: July 18, 2023
    Date of Patent: October 15, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Kubota, Yoshiaki Oikawa, Kensuke Yoshizumi
  • Publication number: 20240321903
    Abstract: The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.
    Type: Application
    Filed: May 30, 2024
    Publication date: September 26, 2024
    Inventors: Masayuki SAKAKURA, Yoshiaki OIKAWA, Shunpei YAMAZAKI, Junichiro SAKATA, Masashi TSUBUKU, Kengo AKIMOTO, Miyuki HOSOBA
  • Publication number: 20240283544
    Abstract: A transmission apparatus causes a digital-to-analog conversion unit to perform digital-to-analog conversion on transmission signals pre-equalized by using a compensation filter, then converts electrical signals into optical signals, and outputs the optical signals. A receiving apparatus converts the received optical signals into received electrical signals, then performs analog-to-digital conversion, and demodulates the received signals. A scale estimation unit calculates a slope near an amplitude 0 in a correlation between an amplitude distribution of the pre-equalized transmission signals and an amplitude distribution of the received signals. A scale unit scales amplitude of the received signals on the basis of the calculated slope. A coefficient estimation unit calculates a filter coefficient of the compensation filter on the basis of the pre-equalized transmission signals and the scaled received signals.
    Type: Application
    Filed: June 23, 2021
    Publication date: August 22, 2024
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Masanori NAKAMURA, Takeo SASAI, Etsushi YAMAZAKI, Yoshiaki KISAKA
  • Patent number: 12057511
    Abstract: An object is to improve reliability of a light-emitting device. A light-emitting device has a driver circuit portion including a transistor for a driver circuit and a pixel portion including a transistor for a pixel over one substrate. The transistor for the driver circuit and the transistor for the pixel are inverted staggered transistors each including an oxide semiconductor layer in contact with part of an oxide insulating layer. In the pixel portion, a color filter layer and a light-emitting element are provided over the oxide insulating layer. In the transistor for the driver circuit, a conductive layer overlapping with a gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed using metal conductive films.
    Type: Grant
    Filed: March 29, 2023
    Date of Patent: August 6, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Masayuki Sakakura, Yoshiaki Oikawa, Kenichi Okazaki, Hotaka Maruyama
  • Publication number: 20090297733
    Abstract: A lab-on-chip substrate includes a resin having a silicon content of 10% or less by weight as its base material and a hydrophilic polymer covalently bound onto the surface thereof by high-energy ray irradiation suitable for a protein-processing chip. The lab-on-chip substrate is resistant to washing and usable for an extended period of time without adsorption of proteins on the base material surface, i.e., a protein electrophoretic polymeric chip having a microchannel allowing high-accuracy analysis of trace amounts of proteins because of reduction in the amount of detection noise.
    Type: Application
    Filed: August 13, 2009
    Publication date: December 3, 2009
    Applicant: Toray Industries, Inc.
    Inventors: Yoshiaki Yamazaki, Naoki Kawazoe, Masashi Higasa, Giman Jung, Hitoshi Nobumasa, Yuji Murakami
  • Patent number: 7457996
    Abstract: In a test mode, a comparator compares for each column a value of data read from each memory cell connected to an activated word line with an expected value to be read from each memory cell. An error register holds error data based on a comparison result by a comparator. Each bit of the error data indicates the comparison result by the comparator for a corresponding column. Each bit is set to “0” when the comparison result for the corresponding column always indicates equality whichever word line is activated, and is set to “1” when once the comparison result for the corresponding column indicates difference.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: November 25, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Soichi Kobayashi, Yoshiaki Yamazaki, Yukihiko Shimazu
  • Publication number: 20080288836
    Abstract: In a test mode, a comparator compares for each column a value of data read from each memory cell connected to an activated word line with an expected value to be read from each memory cell. An error register holds error data based on a comparison result by a comparator. Each bit of the error data indicates the comparison result by the comparator for a corresponding column. Each bit is set to “0” when the comparison result for the corresponding column always indicates equality whichever word line is activated, and is set to “1” when once the comparison result for the corresponding column indicates difference.
    Type: Application
    Filed: July 17, 2008
    Publication date: November 20, 2008
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Soichi Kobayashi, Yoshiaki Yamazaki, Yukihiko Shimazu
  • Publication number: 20070178240
    Abstract: The present invention relates to a lab-on-chip substrate, comprising a resin having a silicon content of 10% or less by weight as its base material and a hydrophilic polymer covalently bound onto the surface thereof by high-energy ray irradiation, and in particular, to a protein-processing chip. The present invention provides a lab-on-chip substrate resistant to washing and usable for an extended period of time without adsorption of proteins on the base material surface, i.e., a protein electrophoretic polymeric chip having a microchannel allowing high-accuracy analysis of trace amounts of proteins because of reduction in the amount of detection noise.
    Type: Application
    Filed: April 21, 2005
    Publication date: August 2, 2007
    Inventors: Yoshiaki Yamazaki, Naoki Kawazoe, Masashi Higasa, Giman Jung, Hitoshi Nobumasa, Yuji Murakami
  • Patent number: 7052237
    Abstract: The pressure distribution curve of the blade suction-side surface excluding the leading edge portion and the trailing edge portion drops in two stages in the area from the leading edge to the minimum pressure point.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: May 30, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Kiyoshi Segawa, Yoshio Shikano, Yoshiaki Yamazaki, Shigeki Senoo, Yoshiharu Nakayama
  • Patent number: 6916005
    Abstract: A displacement sensor includes a ferromagnetic member for forming a magnetic path, a coil for generating a magnetic field in the magnetic path when fed with a high-frequency current, and a low-resistance magnetic-shielding member that moves across magnetic flux passing through the magnetic path. The sensor is excellent in production is, robust, and useful in high speed operation.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: July 12, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazutaka Seo, Masao Morita, Toshie Takeuchi, Yoshiaki Yamazaki, Toshiyuki Yoshizawa, Masafumi Sugawara
  • Publication number: 20050129524
    Abstract: The pressure distribution curve of the blade suction-side surface excluding the leading edge portion and the trailing edge portion drops in two stages in the area from the leading edge to the minimum pressure point.
    Type: Application
    Filed: June 23, 2004
    Publication date: June 16, 2005
    Inventors: Kiyoshi Segawa, Yoshio Shikano, Yoshiaki Yamazaki, Shigeki Senoo, Yoshiharu Nakayama
  • Patent number: 6846160
    Abstract: The present invention relates to a turbine bucket to be provided at the low pressure last stage of a steam turbine and an object of the present invention is to provide a turbine bucket in which the adjacent blades are connected without using a connecting member at a blade intermediate portion. In order to achieve the object of the present invention, a turbine bucket of the present invention is formed in such a manner that the blade sectional configuration is twisted from a blade root portion to a blade tip side, and when assuming two axial directions in a blade section of the bucket on horizontal plane and taking one axial direction as X axis and the other axial direction perpendicular to X axis as Y axis, the blade sections at predetermined heights from the blade root portion of the turbine bucket are formed in a range of ±0.3 mm from respective points defining blade section configurations as shown respectively in chart 1, chart 4, chart 7, chart 10, chart 13, chart 16 and chart 18.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: January 25, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Eiji Saito, Kiyoshi Namura, Yutaka Yamashita, Masakazu Takasumi, Yoshiaki Yamazaki, Yoshio Shikano, Kazuo Ikeuchi, Masumi Katayose
  • Publication number: 20040184328
    Abstract: In a test mode, a comparator compares for each column a value of data read from each memory cell connected to an activated word line with an expected value to be read from each memory cell. An error register holds error data based on a comparison result by a comparator. Each bit of the error data indicates the comparison result by the comparator for a corresponding column. Each bit is set to “0” when the comparison result for the corresponding column always indicates equality whichever word line is activated, and is set to “1” when once the comparison result for the corresponding column indicates difference.
    Type: Application
    Filed: August 4, 2003
    Publication date: September 23, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Soichi Kobayashi, Yoshiaki Yamazaki, Yukihiko Shimazu
  • Patent number: 6776582
    Abstract: A turbine moving blade operated by a working fluid and having a blade profile formed so that a pressure distribution curve defined by a pressure on a blade surface of a suction side of the moving blade drops in two stages in an area from a leading edge to a minimum pressure point.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: August 17, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kiyoshi Segawa, Yoshio Shikano, Yoshiaki Yamazaki, Shigeki Senoo, Yoshiharu Nakayama