Patents by Inventor Yoshie Ohira

Yoshie Ohira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152301
    Abstract: An information processing apparatus include a processor configured to: acquire inspection results on a print product that has been printed in response to multiple print jobs; and generate on each of page groups a reprint job used to print a page indicated as being disqualified by the inspection results, the page group sequentially printed and having an attribute common to the print jobs.
    Type: Application
    Filed: May 22, 2023
    Publication date: May 9, 2024
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Takashi KIKUMOTO, Yoshie OHIRA, Shogo ISHIKAWA, Kazuhiro OHKAWA
  • Publication number: 20240103783
    Abstract: An image processing apparatus includes a processor configured to impose a group of pages on a single sheet as a target for reprinting and perform reprinting, the group of pages being referred to as printing-error pages, each of the pages having been printed with a printing error that occurred while multiple pages imposed on one or more sheets were printed.
    Type: Application
    Filed: March 7, 2023
    Publication date: March 28, 2024
    Applicant: FUJIFILM BUSINESS INNOVATION CORP.
    Inventors: Bo LIU, Kimihiko Sasaki, Mari Kodama, Yuka Sugiyama, Yoshie Ohira, Naoto Yamasaki, Kazuki Nagashima
  • Publication number: 20240094138
    Abstract: A printed-matter inspection system includes a processor that inspects printed matter, and a display device that displays a result of the inspection. The processor is configured to: compare a scanned image with a reference image of an inspection-target page of the printed matter to perform inspection for at least one defect that is present in the scanned image, the scanned image being obtained by scanning the inspection-target page; and obtain information about post-processing that is to be performed on the printed matter, and, on the basis of the information about the post-processing, display, on the display device, the at least one defect in association with at least one simulated image of the printed matter obtained after the post-processing.
    Type: Application
    Filed: April 13, 2023
    Publication date: March 21, 2024
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Yoshie OHIRA, Takashi KIKUMOTO, Shogo ISHIKAWA
  • Publication number: 20240095904
    Abstract: An image processing apparatus includes a processor configured to: compare reference image data serving as a reference for inspection with inspection-target image data expressing an inspection target and identify a coordinate region including a difference between the reference image data and the inspection-target image data as a defective region; and store a satisfactory region in the reference image data and the satisfactory region in the inspection-target image data in a low volume format with a low data volume into a memory; and store the defective region in the reference image data and the defective region in the inspection-target image data in a high image quality format with a large data volume and high image quality, as compared with the low volume format, into the memory, the satisfactory region being a region other than the defective region.
    Type: Application
    Filed: March 14, 2023
    Publication date: March 21, 2024
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Shogo ISHIKAWA, Takashi Kikumoto, Yoshie Ohira
  • Publication number: 20240069824
    Abstract: An information processing system includes one or more processors configured to: acquire document data and imposition information, the document data being constituted by multiple pieces of image data, the imposition information being information about imposition of the document data; and, if pieces of image data, among the multiple pieces of image data, to be imposed on one or more pages have been received, the one or more pages being included in multiple pages that serve as printing surfaces of sheets on which the document data is to be printed based on the imposition information, perform control to notify a user that printing of the one or more pages is ready.
    Type: Application
    Filed: March 3, 2023
    Publication date: February 29, 2024
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Naoto YAMASAKI, Yoshie OHIRA
  • Publication number: 20230401407
    Abstract: An information processing apparatus includes: a processor configured to: execute a displaying process for displaying, on a setting screen, an image obtained by rasterizing a page in print data; and execute a receiving process for receiving setting of at least one of an inspection target region serving as a target of an inspection or an inspection exception region to be excepted from the inspection, the setting being performed on the image displayed on the setting screen and received from a user.
    Type: Application
    Filed: October 17, 2022
    Publication date: December 14, 2023
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Yoshie OHIRA, Takashi KIKUMOTO, Shogo ISHIKAWA
  • Publication number: 20230297297
    Abstract: A printed material inspection system includes a processor configured to inspect a quality of a printed material; and a display that displays a result of the inspection. The processor is configured to: by reading and executing a program, compare a scanned image obtained by scanning an inspection target page of the printed material, out of pages forming a job, with a reference image created based on rasterize data of the inspection target page and perform an inspection of whether or not a first defect is present in the scanned image at a first inspection level, which is a preset initial level or a level set by a user; automatically perform an inspection of whether or not a second defect is present in the scanned image at a second inspection level that is different from the first inspection level; and display the first defect and the second defect on the display in such a manner that the first defect and the second defect are able to be distinguished from each other.
    Type: Application
    Filed: August 11, 2022
    Publication date: September 21, 2023
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Shogo ISHIKAWA, Yoshie OHIRA, Takashi KIKUMOTO
  • Publication number: 20230269333
    Abstract: A printed-matter inspection system includes a processor for evaluating quality of printed matter, and a display apparatus. The processor is configured, by reading a program for execution, to: for each of multiple pages in a job, if the page is an inspection target, compare, for inspection, a scanned image with a reference image, the scanned image being obtained through scanning of printed matter in the page, the reference image being generated by using rasterized data for the page; and, in display of the result of the inspection on the display apparatus, display the scanned image for the page that is an inspection target, and display, for a page that is not an inspection target, a dummy page and information indicating that the page is not an inspection target, the dummy page being a substitute of the scanned image.
    Type: Application
    Filed: August 8, 2022
    Publication date: August 24, 2023
    Applicant: FUJIFILM Business Innovation Corp.
    Inventors: Takashi KIKUMOTO, Yoshie OHIRA, Shogo ISHIKAWA
  • Publication number: 20220198190
    Abstract: An information processing apparatus includes a processor configured to control a display such that a result of recognition, which is obtained by recognizing an image on which a character string is written, and a result of comparison, which is obtained by comparing the result of recognition with a database registered in advance, are displayed next to each other.
    Type: Application
    Filed: May 21, 2021
    Publication date: June 23, 2022
    Applicant: FUJIFILM Business Innovation Corp.
    Inventor: Yoshie OHIRA
  • Publication number: 20220198210
    Abstract: An information processing apparatus includes a processor configured to: read character string information written on a paper document; obtain, from an external system that performs processing using the read character string information, external system information indicating a use condition relating to use of character string information in the external system; and determine whether the read character string information matches the external system information obtained from the external system.
    Type: Application
    Filed: May 25, 2021
    Publication date: June 23, 2022
    Applicant: FUJIFILM Business Innovation Corp.
    Inventor: Yoshie OHIRA
  • Publication number: 20190196695
    Abstract: A document processing apparatus includes an execution unit that executes text selection processing for selecting text data from an electronic document, and a display controller that performs, when the text data is not included in the electronic document, control so as to display an indication that execution of the text selection processing is disabled before a user attempts to execute the text selection processing.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 27, 2019
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Shingo KATO, Masayuki IWASAWA, Yoshie OHIRA
  • Publication number: 20190155889
    Abstract: A document processing apparatus includes a reception unit and a display control unit. The reception unit receives specification of a region in an electronic document by a user. The display control unit performs control such that a candidate for attribute information is displayed from a string in the region received by the reception unit, based on determination information as information for determining a type of attribute information.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 23, 2019
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Yoshie OHIRA, Masayuki IWASAWA, Shingo KATO
  • Patent number: 10222281
    Abstract: A force detection apparatus includes a substrate and a force transmission block. The substrate includes: a high-sensitive mesa gauge that is provided on a main surface, extends in a first direction to produce a relatively large change of an electric resistance in accordance with compressive stress, and includes a top surface; a low-sensitive mesa gauge that is provided on the main surface, extends in a second direction to produce a relatively small change of an electric resistance, and includes a top surface; and a mesa lead that is provided on the main surface, extends in a third direction, and includes a top surface. The force transmission block contacts the top surface of the high-sensitive mesa gauge and the top surface of the low-sensitive mesa gauge, and is non-contact with at least a part of the top surface of the mesa lead.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: March 5, 2019
    Assignee: DENSO CORPORATION
    Inventors: Kentaro Mizuno, Rie Taguchi, Shoji Hashimoto, Yoshie Ohira, Takashi Katsumata, Kouhei Yamaguchi
  • Publication number: 20170102274
    Abstract: A force detection apparatus includes a substrate and a force transmission block. The substrate includes: a high-sensitive mesa gauge that is provided on a main surface, extends in a first direction to produce a relatively large change of an electric resistance in accordance with compressive stress, and includes a top surface; a low-sensitive mesa gauge that is provided on the main surface, extends in a second direction to produce a relatively small change of an electric resistance, and includes a top surface; and a mesa lead that is provided on the main surface, extends in a third direction, and includes a top surface. The force transmission block contacts the top surface of the high-sensitive mesa gauge and the top surface of the low-sensitive mesa gauge, and is non-contact with at least a part of the top surface of the mesa lead.
    Type: Application
    Filed: March 24, 2015
    Publication date: April 13, 2017
    Inventors: Kentaro MIZUNO, Rie TAGUCHI, Shoji HASHIMOTO, Yoshie OHIRA, Takashi KATSUMATA, Kouhei YAMAGUCHI
  • Patent number: 7560998
    Abstract: 1st to nth pairs of transistors (n=an odd number) are connected in parallel, and each pair of transistors has an upper transistor and a lower transistor connected in series. A point between the upper transistor and the lower transistor of a preceding pair of transistors is connected to a gate of the lower transistor of a subsequent transistor, and the point between the upper transistor and the lower transistor of nth pair of transistors is connected to the gate of the first lower transistor. A capacitor is inserted between the lower transistor and a direct power source. A current regulating circuit connected to gates of the upper transistors, wherein the current regulating circuit supplies a gate voltage to each gate of the each upper transistor.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: July 14, 2009
    Assignees: Kabushiki Kaisha Toyoto Chuo Kenkyusho, Denso Corporation
    Inventors: Norikazu Ohta, Yoshie Ohira, Yasuaki Makino, Hiromi Ariyoshi
  • Publication number: 20070146072
    Abstract: 1st to nth pairs of transistors (n=an odd number) are connected in parallel, and each pair of transistors has an upper transistor and a lower transistor connected in series. A point between the upper transistor and the lower transistor of a preceding pair of transistors is connected to a gate of the lower transistor of a subsequent transistor, and the point between the upper transistor and the lower transistor of nth pair of transistors is connected to the gate of the first lower transistor. A capacitor is inserted between the lower transistor and a direct power source. A current regulating circuit connected to gates of the upper transistors, wherein the current regulating circuit supplies a gate voltage to each gate of the each upper transistor.
    Type: Application
    Filed: November 27, 2006
    Publication date: June 28, 2007
    Applicants: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO, DENSO CORPORATION
    Inventors: Norikazu Ohta, Yoshie Ohira, Yasuaki Makino, Hiromi Ariyoshi
  • Patent number: 7233136
    Abstract: A reference voltage circuit includes an operational amplifier, a first fixed resistance resistor, a second fixed resistance resistor, a third fixed resistance resistor, a first diode and a second diode. The reference voltage circuit further includes a fourth fixed resistance resistor having an end connected to a non-inverting input terminal of the operational amplifier and the other end connected to the first diode. The reference voltage circuit is characterized by a value of the resistance of the fourth resistor being less than the resistance of the first resistor and a temperature coefficient of the fourth resistor being greater than any of the temperature coefficients of the first, second and third resistors.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: June 19, 2007
    Assignee: Denso Corporation
    Inventors: Yasuaki Makino, Norikazu Ohta, Yoshie Ohira, Hirofumi Funabashi
  • Publication number: 20060176043
    Abstract: A reference voltage circuit includes an operational amplifier, a first fixed resistance resistor, a second fixed resistance resistor, a third fixed resistance resistor, a first diode and a second diode. The reference voltage circuit further includes a fourth fixed resistance resistor having an end connected to a non-inverting input terminal of the operational amplifier and the other end connected to the first diode. The reference voltage circuit is characterized by a value of the resistance of the fourth resistor being less than the resistance of the first resistor and a temperature coefficient of the fourth resistor being greater than any of the temperature coefficients of the first, second and third resistors.
    Type: Application
    Filed: December 20, 2005
    Publication date: August 10, 2006
    Applicant: DENSO CORPORATION
    Inventors: Yasuaki Makino, Norikazu Ohta, Yoshie Ohira, Hirofumi Funabashi