Abstract: An electrostatic chuck includes a base plate including a penetration hole, a placing table arranged on the base plate, and including an electrode at a position corresponding to the penetration hole, a first cylindrical insulating component arranged on an upper side inside the penetration hole of the base plate, a second cylindrical insulating component arranged on the first cylindrical insulating component, a third cylindrical insulating component arranged under the first cylindrical insulating component, and having an inner diameter smaller than an inner diameter of the first cylindrical insulating component, a connector arranged in the penetration hole, a cylindrical member included in the connector, and including an elastic body in an inner part, and a power feeding terminal included in the connector, and connected to the elastic body. The power feeding terminal touches the electrode of the placing table.

Abstract: An electrostatic chuck includes a base plate including a penetration hole, a placing table arranged on the base plate, and including an electrode at a position corresponding to the penetration hole, a first cylindrical insulating component arranged on an upper side inside the penetration hole of the base plate, a second cylindrical insulating component arranged on the first cylindrical insulating component, a third cylindrical insulating component arranged under the first cylindrical insulating component, and having an inner diameter smaller than an inner diameter of the first cylindrical insulating component, a connector arranged in the penetration hole, a cylindrical member included in the connector, and including an elastic body in an inner part, and a power feeding terminal included in the connector, and connected to the elastic body. The power feeding terminal touches the electrode of the placing table.

Abstract: A method and a program (recorded on a recording medium) for securing a curved circuit board in a flat fashion on (a film application stage and) a bonding stage of a die bonder provided with suction cavities formed in a substrate suction surface of the bonding stage that suctions the curved circuit board, including the steps of evacuating air from the vacuum suction cavities using a vacuum device, and moving a die collet provided at a tip end of a bonding arm to press the circuit board down and thus sealing at least one of the vacuum suction cavities by the circuit board so as to allow the remaining vacuum suction cavities to be sealed successively by the flattened circuit board, thereby sealing the upper surfaces of all the vacuum suction cavities by the flattened circuit board, so that the circuit board is suction-held and secured on the bonding stage.

Abstract: A chip is fixed via an insulating film on a tape carrier on one main surface of which plural inner leads are laid and each electrode pad of the chip is bonded to each inner lead. The inner lead is bonded to the electrode pad when the chip is supplied in a fixed position for a bonding tool using a sprocket hole of the ape carrier. Next, the respective positions of the inner lead and the electrode pad are recognized and the center line of the inner lead is recognized. The inner lead is touched to the chip by the bonding tool and after the inner lead is pushed in the direction of the base and bent in the form of a letter S. the end of the inner lead is bonded to the electrode pad by thermocompression by the bonding tool.

Abstract: A wafer ring supplying and returning apparatus including a magazine that accommodates wafer rings, a jig holder that holds the wafer rings, a drier that causes contraction of the wafer sheets on used wafer rings, and a wafer chucking member that chucks and conveys the wafer rings, and the apparatus further including buffer sections having two (upper and lower) wafer supporting grooves that support wafer rings and a wafer pushing member disposed on or below the wafer chucking member so as to push the wafer rings. The wafer chucking member is disposed so as to face one of the wafer supporting grooves of the buffer sections, and the wafer pushing member is disposed so as to face another one of the wafer supporting grooves.

Abstract: To stabilize the form of a letter S of an inner lead after bonding in a method of manufacturing &mgr;BGA·IC in which a chip is fixed via an insulating film on a tape carrier on one main surface of which plural inner leads are laid and each electrode pad of the chip is bonded to each inner lead, when the inner lead is bonded to the electrode pad, first, the chip is supplied in a fixed position for a bonding tool using a sprocket hole of the tape carrier. Next, the respective positions of the inner lead and the electrode pad are recognized using a feature lead and an electrode pad. Afterward, the center line of the inner lead is recognized, the inner lead is touched to the chip by the bonding tool and after the inner lead is pushed in the direction of the base and bent in the form of a letter S, the end of the inner lead is bonded to the electrode pad by thermocompression by the bonding tool.

Abstract: A method for stabilizing the form of a letter S of an inner lead after bonding in a method of manufacturing &mgr;BGA·IC in which a chip is fixed via an insulating film on a tape carrier on one main surface of which plural inner leads are laid and each electrode pad of the chip is bonded to each inner lead is disclosed. The inner lead is bonded to the electrode pad when the chip is supplied in a fixed position for a bonding tool. Next, the respective positions of the inner lead and the electrode pad are recognized using a feature lead and an electrode pad. The center line of the inner lead is recognized, the inner lead is pushed to the chip in the direction of the base and bent in the form of a letter S, the end of the inner lead is bonded to the electrode pad by thermocompression by the bonding tool.

Abstract: A wafer ring supplying and returning apparatus including a magazine that accommodates wafer rings, a jig holder that holds the wafer rings, a drier that causes contraction of the wafer sheets on used wafer rings, and a wafer chucking member that chucks and conveys the wafer rings, and the apparatus further including buffer sections having two (upper and lower) wafer supporting grooves that support wafer rings and a wafer pushing member disposed on or below the wafer chucking member so as to push the wafer rings. The wafer chucking member is disposed so as to face one of the wafer supporting grooves of the buffer sections, and the wafer pushing member is disposed so as to face another one of the wafer supporting grooves.

Abstract: To stabilize the form of a letter S of an inner lead after bonding in a method of manufacturing &mgr;BGA•IC in which a chip is fixed via an insulating film on a tape carrier on one main surface of which plural inner leads are laid and each electrode pad of the chip is bonded to each inner lead, when the inner lead is bonded to the electrode pad, first, the chip is supplied in a fixed position for a bonding tool using a sprocket hole of the tape carrier. Next, the respective positions of the inner lead and the electrode pad are recognized using a feature lead and an electrode pad. Afterward, the center line of the inner lead is recognized, the inner lead is touched to the chip by the bonding tool and after the inner lead is pushed in the direction of the base and bent in the form of a letter S, the end of the inner lead is bonded to the electrode pad by thermocompression by the bonding tool.

Abstract: A method and apparatus for stabilizing the form of a letter S of an inner lead after bonding in a method of manufacturing &mgr;BGAoIC in which a chip is fixed via an insulating film on a tape carrier on one main surface of which plural inner leads are laid and each electrode pad of the chip is bonded to each inner lead is disclosed. The inner lead is bonded to the electrode pad when the chip is supplied in a fixed position for a bonding tool using a sprocket hole of the tape carrier. Next, the respective positions of the inner lead and the electrode pad are recognized using a feature lead and an electrode pad. Afterward, the center line of the inner lead is recognized, the inner lead is touched to the chip by the bonding tool and after the inner lead is pushed in the direction of the base and bent in the form of a letter S, the end of the inner lead is bonded to the electrode pad by thermocompression by the bonding tool.

Abstract: An epitaxial crystal grown layer structure which permits, on an In-doped GaAs substrate, which will be industrially used in large quantities, the growth of an epitaxial layer having the same good quality as the epitaxial layer grown on an undoped GaAs substrate.

Abstract: A semiconductor device which utilizes the fact that the effective mass of charged particles becomes exceedingly large at certain points in the direction of a periodically repeating potential by virtue of a periodic structure in which semiconductor layers are stacked in the form of a superlattice. The periodic structure enables the movement of charged particles to be one-dimensional and thus permits a great improvement in the mobility of charged particles in the channel direction. Accordingly, it is possible to realize a FET of ultrahigh mobility.

Abstract: A semiconductor laser having high efficiency of luminescence can be obtained by forming a spatial fluctuation of potential so that the potential differs from position to position inside a plane perpendicular to a current flowing direction and electrons and holes or excitons formed by a combination of them can be localized not only in the current flowing direction but also inside the plane perpendicular to the current flowing direction. More definitely, corrugations or ruggedness having a mean pitch of below 100 nm and a level difference of from 1/10 to 1/2 of the mean thickness of an active layer are formed on the surface of the active layer of the semiconductor laser.

Abstract: There is disclosed a semiconductor device comprising at least first and second semiconductor layers positioned to form a hetero-junction therebetween, such a hetero-junction being adapted to form a channel, means for controlling carriers, and source and drain areas on opposite edges of the channel, wherein the first and second semiconductor layers formed between the source and drain regions have an area containing only 10.sup.16 cm.sup.-3 or less of an impurity; the first semiconductor layer has a wider forbidden band than that of the second semiconductor layer; and further including at least one semiconductor layer having a higher activation efficiency of impurities than that of the first semiconductor layer, with such at least one semiconductor layer being located on the side of the first semiconductor layer not in contact with the second semiconductor layer. A multi-quantum well structure may be used as the higher impurity activation efficiency semiconductor layer.

Abstract: A semiconductor member has a structure wherein a first semiconductor layer is held between second and third semiconductor layers which have forbidden band widths greater than a forbidden band width of the first semiconductor layer, and wherein only the second semiconductor layer which is formed on a side of the first semiconductor layer close to a substrate is doped with impurities. The semiconductor member constructs the depletion type with the first and second semiconductor layers, and the enhancement type with the first and third semiconductor layers. A semiconductor device can be properly formed in the enhancement or depletion type by selectively connecting the semiconductor layers.

Abstract: A semiconductor device includes a polycrystalline semiconductor film body having at least one element selected from a group consisting of hydrogen, fluorine, chlorine, bromine, iodine, lithium, sodium, potassium, rubidium, and cesium included mainly around grain boundaries of the polycrystalline semiconductor film. The simultaneous inclusion of one of the halogen elements and one of the monovalent metal elements of the group described above is more effective to quench charges of the elements included. The content of the elements included is up to 40% by atomic ratio. As a result, the electronic characteristic of the polycrystalline semiconductor film are substantially improved.

Abstract: In a semiconductor device having at least a first semiconductor layer and a second semiconductor layer which are arranged so as to form a heterojunction, an edge of a conduction band of the first semiconductor layer being positioned lower in energy than an edge of a conduction band of the second semiconductor layer in the vicinity of the heterojunction, at least one pair of electrodes which are electronically connected with the first semiconductor layer, and means to control carriers induced in the vicinity of the heterojunction; a semiconductor device characterized in that a low impurity concentration region is comprised in at least the part of the first semiconductor layer between the pair of electrodes, that a region adjoining each of the pair of electrodes is a high impurity concentration region, and that at least one layer containing an impurity which has a conductivity type identical or opposite to that of an impurity contained in the aforementioned regions is comprised in the first semiconductor layer.

Abstract: The semiconductor device of the present invention is characterized by a device consisting of at least a heterojunction formed by the first semiconductor layer and the second semiconductor layer where the forbidden band gap of the said first semiconductor is smaller than that of the said second semiconductor, at least one pair of electrode regions connected electronically to the said first semiconductor and a means to control the carrier density in the said first semiconductor layer where the impurities are not included effectively in the region in the first semiconductor under the means to control the carriers and are included in the region adjacent to the said one pair of electrodes. The density of the impurities in these region are preferably be larger than 10.sup.16 cm.sup.-3.

Abstract: A thin film solar cell formed on a substrate, comprising at least first and second electrodes, at least one of which is capable of passing light, a silicon film interposed between said first and second electrodes, and at least one junction formed in the silicon film for separating electrons and positive holes when the cell is exposed to light, wherein said silicon film comprises a mixed phase consisting of a polycrystalline phase and an amorphous phase, and includes at least about 50% by volume of fibrous crystalline grains, each of said grains having a maximum bottom diameter of about 1 .mu.m and a minimum height of about 50 nm and having its grain boundaries terminated with a monovalent element.The solar cell has a high photoelectric conversion efficiency comparable to that of a single-crystal solar cell, and can be produced at a low cost.

Abstract: A semiconductor device is disclosed wherein a polycrystalline film whose principal constituent is silicon is formed on an amorphous or polycrystalline substrate, the polycrystalline film having a carrier mobility of at least 1 cm.sup.2 /V.multidot.sec, and wherein at least one active device is formed by employing the polycrystalline film as its material. A large-area or elongate active device can be provided. The polycrystalline film for such semiconductor device is formed by a method wherein the amorphous or polycrystalline substrate is mounted in a vacuum chamber and wherein the polycrystalline film whose principal constituent is silicon is evaporated on the substrate under the conditions that the pressure during the evaporation is below 1.times.10.sup.-8 Torr and that the partial pressure of oxygen during the evaporation is below 1.times.10.sup.-9 Torr.