Patents by Inventor Yoshifumi Matsuzaki

Yoshifumi Matsuzaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11152465
    Abstract: A semiconductor device includes an n-type base substrate; a p-type first region; a p-type surface region having a plurality of second corner portions and a plurality of second side portions surrounding the first region. The p-type surface region has a dopant concentration lower than a dopant concentration of the first region. The semiconductor device further includes a field plate in a region overlapping with the surface region in a plan view by way of an insulation film. The field plate has a plurality of field plate corner portions and a plurality of field plate side portions. A relationship of L1>L2 is established at least at a portion of the surface region or a relationship of FP1>FP2 is established at least at a portion of the field plate is satisfied. A withstand voltage of the second side portion is lower than a withstand voltage of the second corner portion.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: October 19, 2021
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Hideyuki Nakamura, Yoshifumi Matsuzaki, Hirokazu Ito
  • Publication number: 20200052069
    Abstract: A semiconductor device includes an n-type base substrate; a p-type first region; a p-type surface region having a plurality of second corner portions and a plurality of second side portions surrounding the first region. The p-type surface region has a dopant concentration lower than a dopant concentration of the first region. The semiconductor device further includes a field plate in a region overlapping with the surface region in a plan view by way of an insulation film. The field plate has a plurality of field plate corner portions and a plurality of field plate side portions. A relationship of L1>L2 is established at least at a portion of the surface region or a relationship of FP1>FP2 is established at least at a portion of the field plate is satisfied. A withstand voltage of the second side portion is lower than a withstand voltage of the second corner portion.
    Type: Application
    Filed: August 31, 2017
    Publication date: February 13, 2020
    Inventors: Hideyuki NAKAMURA, Yoshifumi MATSUZAKI, Hirokazu ITO
  • Patent number: 9142624
    Abstract: A semiconductor device includes a semiconductor base body having an n+-type semiconductor layer and an n?-type semiconductor layer p+-type diffusion regions selectively formed on a surface of the n?-type semiconductor layer, and a barrier metal layer formed on a surface of the n?-type semiconductor layer and surfaces of p+-type diffusion regions. A Schottky junction is between the barrier metal layer and the n?-type semiconductor layer. An ohmic junction is between the barrier metal layer and the p+-type diffusion regions. Platinum is diffused into the semiconductor base body such that a concentration of platinum becomes maximum in a surface of the n?-type semiconductor layer.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: September 22, 2015
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventor: Yoshifumi Matsuzaki
  • Publication number: 20150001667
    Abstract: A semiconductor device includes a semiconductor base body having an n+-type semiconductor layer and an n?-type semiconductor layer p+-type diffusion regions selectively formed on a surface of the n?-type semiconductor layer, and a barrier metal layer formed on a surface of the n?-type semiconductor layer and surfaces of p+-type diffusion regions. A Schottky junction is between the barrier metal layer and the n?-type semiconductor layer. An ohmic junction is between the barrier metal layer and the p+-type diffusion regions. Platinum is diffused into the semiconductor base body such that a concentration of platinum becomes maximum in a surface of the n?-type semiconductor layer.
    Type: Application
    Filed: July 3, 2012
    Publication date: January 1, 2015
    Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventor: Yoshifumi Matsuzaki
  • Publication number: 20070144722
    Abstract: A method of producing a tube which has a tube body portion constituting an outer hull of flow passages, and flow passage dividers for dividing the flow passages, comprising a roll forming process to form the tube, a cutting process to cut the tube to a predetermined length after the roll forming process, and a brazing process to braze the tube contact portions of the flow passage dividers to the inner surface of the tube body portion after the cutting process. The cutting process forms a slit in the tube, and so as to concentrate a stress on the slit, thereby to cut the tube starting from the slit. The slit is formed in only the tube body portion between the tube body portion and the flow passage dividers or formed ranging from the tube body portion to the tube contact portions of the flow passage dividers.
    Type: Application
    Filed: December 15, 2004
    Publication date: June 28, 2007
    Inventors: Yoshifumi Matsuzaki, Soichi Kato, Jun Akaike, Hiromichi Ito