Patents by Inventor Yoshifumi Muramoto
Yoshifumi Muramoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11264519Abstract: A light receiving element includes a first substrate, a photodiode formed on a main surface of the first substrate, and a second substrate constituted by a semiconductor and adhered to a rear surface side of the first substrate by an adhesive layer formed from a resin adhesive. A light receiving element according to an embodiment includes a lens that is formed on the side of an adhesion surface of the second substrate, has a convex surface, and is disposed in a light receiving region of the photodiode. The light receiving side of the photodiode is oriented toward the side of the first substrate. The lens is disposed so that the convex surface thereof is oriented toward the side of a light receiving surface of the photodiode.Type: GrantFiled: March 27, 2019Date of Patent: March 1, 2022Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Yoshiho Maeda, Fumito Nakajima, Yoshifumi Muramoto, Atsushi Kanda, Kimikazu Sano
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Publication number: 20210043785Abstract: A light receiving element includes a first substrate, a photodiode formed on a main surface of the first substrate, and a second substrate constituted by a semiconductor and adhered to a rear surface side of the first substrate by an adhesive layer formed from a resin adhesive. A light receiving element according to an embodiment includes a lens that is formed on the side of an adhesion surface of the second substrate, has a convex surface, and is disposed in a light receiving region of the photodiode. The light receiving side of the photodiode is oriented toward the side of the first substrate. The lens is disposed so that the convex surface thereof is oriented toward the side of a light receiving surface of the photodiode.Type: ApplicationFiled: March 27, 2019Publication date: February 11, 2021Inventors: Yoshiho Maeda, Fumito Nakajima, Yoshifumi Muramoto, Atsushi Kanda, Kimikazu Sano
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Patent number: 10374107Abstract: An optical waveguide integrated light receiving element includes an optical waveguide (105) arranged on a side of a second contact layer (102) opposite to a side where a light absorption layer (103) is arranged, having a waveguide direction parallel to a plane of the light absorption layer (103), and optically coupled with the second contact layer (102). The second contact layer (102) has, in a planar view, a size of an area smaller than that of the light absorption layer (103) and arranged inside the light absorption layer (103).Type: GrantFiled: April 14, 2017Date of Patent: August 6, 2019Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Masahiro Nada, Yoshifumi Muramoto, Hideaki Matsuzaki
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Publication number: 20190157472Abstract: An optical waveguide integrated light receiving element includes an optical waveguide (105) arranged on a side of a second contact layer (102) opposite to a side where a light absorption layer (103) is arranged, having a waveguide direction parallel to a plane of the light absorption layer (103), and optically coupled with the second contact layer (102). The second contact layer (102) has, in a planar view, a size of an area smaller than that of the light absorption layer (103) and arranged inside the light absorption layer (103).Type: ApplicationFiled: April 14, 2017Publication date: May 23, 2019Inventors: Masahiro NADA, Yoshifumi MURAMOTO, Hideaki MATSUZAKI
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Patent number: 10297705Abstract: To obtain high linearity without sacrificing light-receiving sensitivity and a high speed, an avalanche photodiode includes an avalanche layer (103) formed on a first light absorption layer (102), an n-field control layer (104) formed on the avalanche layer (103), and a second light absorption layer (105) formed on the field control layer (104). If a reverse bias voltage is applied, a donor impurity in the field control layer (104) ionizes, and a high electric field is induced in the avalanche layer (103). The n-type doping amount in the field control layer (104) is set such that the impurity concentration in the second light absorption layer (105) sufficiently depletes at the time of reverse bias application.Type: GrantFiled: November 27, 2015Date of Patent: May 21, 2019Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Masahiro Nada, Yoshifumi Muramoto, Fumito Nakajima, Hideaki Matsuzaki
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Publication number: 20180331246Abstract: To obtain high linearity without sacrificing light-receiving sensitivity and a high speed, an avalanche photodiode includes an avalanche layer (103) formed on a first light absorption layer (102), an n-field control layer (104) formed on the avalanche layer (103), and a second light absorption layer (105) formed on the field control layer (104). If a reverse bias voltage is applied, a donor impurity in the field control layer (104) ionizes, and a high electric field is induced in the avalanche layer (103). The n-type doping amount in the field control layer (104) is set such that the impurity concentration in the second light absorption layer (105) sufficiently depletes at the time of reverse bias application.Type: ApplicationFiled: November 27, 2015Publication date: November 15, 2018Inventors: Masahiro NADA, Yoshifumi MURAMOTO, Fumito NAKAJIMA, Hideaki MATSUZAKI
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Patent number: 9006854Abstract: An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an outType: GrantFiled: September 1, 2011Date of Patent: April 14, 2015Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
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Patent number: 8916946Abstract: The present invention is intended to provide a compact and simple optical semiconductor device that reduces crosstalk (leakage current) between light receiving elements. According to the present invention, since a back surface electrode is a mirror-like thin film, crosstalk to an adjacent light receiving element can be suppressed, thereby reducing a detection error of a light intensity. By disposing a patterned back surface electrode or by disposing an ohmic electrode at the bottom of an insulating film over the whole back surface, contact resistance on the back surface can be reduced. By using the optical semiconductor elements with a two-dimensional arrangement and by using a mirror-like thin film as the back surface electrode, crosstalk can be reduced. By accommodating the optical semiconductor elements in the housing in a highly hermetic condition, the optical semiconductor elements can be protected from an external environment.Type: GrantFiled: March 4, 2014Date of Patent: December 23, 2014Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Yoshiyuki Doi, Yoshifumi Muramoto, Takaharu Ohyama
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Publication number: 20140183677Abstract: The present invention is intended to provide a compact and simple optical semiconductor device that reduces crosstalk (leakage current) between light receiving elements. According to the present invention, since a back surface electrode is a mirror-like thin film, crosstalk to an adjacent light receiving element can be suppressed, thereby reducing a detection error of a light intensity. By disposing a patterned back surface electrode or by disposing an ohmic electrode at the bottom of an insulating film over the whole back surface, contact resistance on the back surface can be reduced. By using the optical semiconductor elements with a two-dimensional arrangement and by using a mirror-like thin film as the back surface electrode, crosstalk can be reduced. By accommodating the optical semiconductor elements in the housing in a highly hermetic condition, the optical semiconductor elements can be protected from an external environment.Type: ApplicationFiled: March 4, 2014Publication date: July 3, 2014Applicants: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Yoshiyuki Doi, Yoshifumi Muramoto, Takaharu Ohyama
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Patent number: 8754445Abstract: A layer in which the potential level difference normally unrequired for device operation is generated is positively inserted in a device structure. The potential level difference has such a function that even if a semiconductor having a small bandgap is exposed on a mesa side surface, a potential drop amount of the portion is suppressed, and a leakage current inconvenient for device operation can be reduced. This effect can be commonly obtained for a heterostructure bipolar transistor, a photodiode, an electroabsorption modulator, and so on. In the photodiode, since the leakage current is alleviated, the device size can be reduced, so that in addition to improvement of operating speed with a reduction in series resistance, it is advantageous that the device can be densely disposed in an array.Type: GrantFiled: January 20, 2012Date of Patent: June 17, 2014Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Toshihide Yoshimatsu, Haruki Yokoyama
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Patent number: 8729602Abstract: An APD is provided with a semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa, and in the APD, a total donor concentration of the n-type electric field control layer is lower than a total acceptor concentration of the p-type electric field control layeType: GrantFiled: September 1, 2011Date of Patent: May 20, 2014Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
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Patent number: 8704322Abstract: The present invention is intended to provide a compact and simple optical semiconductor device that reduces crosstalk (leakage current) between light receiving elements. According to the present invention, since a back surface electrode is a mirror-like thin film, crosstalk to an adjacent light receiving element can be suppressed, thereby reducing a detection error of a light intensity. By disposing a patterned back surface electrode or by disposing an ohmic electrode at the bottom of an insulating film over the whole back surface, contact resistance on the back surface can be reduced. By using the optical semiconductor elements with a two-dimensional arrangement and by using a mirror-like thin film as the back surface electrode, crosstalk can be reduced. By accommodating the optical semiconductor elements in the housing in a highly hermetic condition, the optical semiconductor elements can be protected from an external environment.Type: GrantFiled: January 23, 2012Date of Patent: April 22, 2014Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Yoshiyuki Doi, Yoshifumi Muramoto, Takaharu Ohyama
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Publication number: 20130313608Abstract: A layer in which the potential level difference normally unrequired for device operation is generated is positively inserted in a device structure. The potential level difference has such a function that even if a semiconductor having a small bandgap is exposed on a mesa side surface, a potential drop amount of the portion is suppressed, and a leakage current inconvenient for device operation can be reduced. This effect can be commonly obtained for a heterostructure bipolar transistor, a photodiode, an electroabsorption modulator, and so on. In the photodiode, since the leakage current is alleviated, the device size can be reduced, so that in addition to improvement of operating speed with a reduction in series resistance, it is advantageous that the device can be densely disposed in an array.Type: ApplicationFiled: January 20, 2012Publication date: November 28, 2013Applicants: NIPPON TELEGRAPH AND TELEPHONE CORPORATION, NTT ELECTRONICS CORPORATIONInventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Toshihide Yoshimatsu, Haruki Yokoyama
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Patent number: 8575650Abstract: An electron injected APD with an embedded n electrode structure in which edge breakdown can be suppressed without controlling the doping profile of an n-type region of the embedded n electrode structure with high precision. The APD comprising a buffer layer with a low ionization rate is inserted between an n electrode connecting layer and an avalanche multiplication layer. Specifically, the APD is an electron injected APD in which an n electrode layer, the n electrode connecting layer, the buffer layer, the avalanche multiplication layer, an electric field control layer, a band gap gradient layer, a low-concentration light absorbing layer, a p-type light absorbing layer, and a p electrode layer are sequentially stacked, and a light absorbing portion that includes at least the low-concentration light absorbing layer and the p-type light absorbing layer forms a mesa shape.Type: GrantFiled: December 11, 2009Date of Patent: November 5, 2013Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Fumito Nakajima, Haruki Yokoyama
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Publication number: 20130168793Abstract: An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an outType: ApplicationFiled: September 1, 2011Publication date: July 4, 2013Applicant: NTT ELECTRONICS CORPORATIONInventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
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Publication number: 20130154045Abstract: An APD is provided with a semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa, and in the APD, a total donor concentration of the n-type electric field control layer is lower than a total acceptor concentration of the p-type electric field control layeType: ApplicationFiled: September 1, 2011Publication date: June 20, 2013Applicants: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
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Publication number: 20120193740Abstract: The present invention is intended to provide a compact and simple optical semiconductor device that reduces crosstalk (leakage current) between light receiving elements. According to the present invention, since a back surface electrode is a mirror-like thin film, crosstalk to an adjacent light receiving element can be suppressed, thereby reducing a detection error of a light intensity. By disposing a patterned back surface electrode or by disposing an ohmic electrode at the bottom of an insulating film over the whole back surface, contact resistance on the back surface can be reduced. By using the optical semiconductor elements with a two-dimensional arrangement and by using a mirror-like thin film as the back surface electrode, crosstalk can be reduced. By accommodating the optical semiconductor elements in the housing in a highly hermetic condition, the optical semiconductor elements can be protected from an external environment.Type: ApplicationFiled: January 23, 2012Publication date: August 2, 2012Applicants: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Yoshiyuki Doi, Yoshifumi Muramoto, Takaharu Ohyama
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Publication number: 20110241150Abstract: An electron injected APD with an embedded n electrode structure in which edge breakdown can be suppressed without controlling the doping profile of an n-type region of the embedded n electrode structure with high precision. The APD comprising a buffer layer with a low ionization rate is inserted between an n electrode connecting layer and an avalanche multiplication layer. Specifically, the APD is an electron injected APD in which an n electrode layer, the n electrode connecting layer, the buffer layer, the avalanche multiplication layer, an electric field control layer, a band gap gradient layer, a low-concentration light absorbing layer, a p-type light absorbing layer, and a p electrode layer are sequentially stacked, and a light absorbing portion that includes at least the low-concentration light absorbing layer and the p-type light absorbing layer forms a mesa shape.Type: ApplicationFiled: December 11, 2009Publication date: October 6, 2011Inventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Fumito Nakajima, Haruki Yokoyama
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Patent number: 7880197Abstract: In an electron-injection type APD, it is necessary to prevent a dark current increase and to secure the life time of the device. It is demanded to improve reliability of the APD with a lower production cost. With the InP buffer layer having an n-type doping region on the inside of a region defined by an optical absorption layer, a predetermined doping profile is achieved by ion implantation. Thus, electric field concentration in the avalanche multiplication layer is relaxed. Furthermore, a low-concentration second optical absorption layer is provided between the optical absorption layer and the avalanche multiplication layer. Responsivity of the optical absorption layer is maximized, and depletion of the lateral surface of the optical absorption layer is prevented; thus, electric field concentration is prevented. Preventing edge breakdown, the device improves its reliability.Type: GrantFiled: June 27, 2006Date of Patent: February 1, 2011Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Yukihiro Hirota, Yoshifumi Muramoto
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Publication number: 20100163925Abstract: In an electron-injection type APD, it is necessary to prevent a dark current increase and to secure the life time of the device. It is demanded to improve reliability of the APD with a lower production cost. With the InP buffer layer having an n-type doping region on the inside of a region defined by an optical absorption layer, a predetermined doping profile is achieved by ion implantation. Thus, electric field concentration in the avalanche multiplication layer is relaxed. Furthermore, a low-concentration second optical absorption layer is provided between the optical absorption layer and the avalanche multiplication layer. Responsivity of the optical absorption layer is maximized, and depletion of the lateral surface of the optical absorption layer is prevented; thus, electric field concentration is prevented. Preventing edge breakdown, the device improves its reliability.Type: ApplicationFiled: June 27, 2006Publication date: July 1, 2010Applicants: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Tadao Ishibashi, Seigo Ando, Yukihiro Hirota, Yoshifumi Muramoto