Patents by Inventor Yoshifumi Ujibashi

Yoshifumi Ujibashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11797562
    Abstract: A processor obtains an input dataset and an output dataset. The processor begins a search process that is a process of searching for a data conversion path of converting the input dataset via one or more intermediate datasets to the output dataset and that includes generating a plurality of intermediate datasets from the input dataset with different data conversion methods, filtering the plurality of intermediate datasets to select a next search intermediate dataset, and generating another intermediate dataset from the next search intermediate dataset. The processor outputs two or more intermediate datasets generated in the course of the search process and receives selection information indicating a selection of part of the two or more intermediate datasets. The processor controls the filtering method for selecting the next search intermediate dataset on the basis of the selection information.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: October 24, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Yui Noma
  • Patent number: 11385870
    Abstract: A non-transitory computer-readable recording medium storing a data transformation program that causes a processor to execute a process. The process includes generating a plurality of first programs, each of the first programs transforming first input data and outputting first output data, contents of the transforming by the plurality of the first programs being different from each other, and among a plurality of pieces of a second input data different from the first input data, outputting the second input data that maximizes an entropy of a plurality of pieces of second output data, where each of the first programs transforms the second input data to the second output data.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: July 12, 2022
    Assignee: Fujitsu Limited
    Inventor: Yoshifumi Ujibashi
  • Publication number: 20220083544
    Abstract: A non-transitory computer-readable recording medium stores an information processing program for causing a computer to execute processing including: acquiring a plurality of regular expressions that is able to be used to search for a portion to be processed from each piece of data of a data group that is generated on the basis of the data included in the data group and data that indicates a processing example of the data; calculating a likelihood of using each regular expression to process the data group on the basis of a portion that corresponds to each of the plurality of acquired regular expressions in each piece of the data of the data group; and outputting the calculated likelihood of each of the regular expressions.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 17, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Takuto Tsuji, Yui Noma, Yoshifumi Ujibashi, Koichi Onoue, Yoshiyuki Sakamaki
  • Patent number: 11210599
    Abstract: An information processing apparatus is disclosed. A processor acquires an upper limit and a lower limit of a probability of a false positive for each of multiple tests based on data-after-aggregation pertinent to a presence or absence of a specific event occurrence acquired by multiple testing, and sets a value from multiple upper limits being acquired. The processor calculates the probability of the false positive with respect to each of tests having lower limits less than the value, and acquires a set of probabilities of the false positive.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: December 28, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Ryusuke Nishikawa, Yoshifumi Ujibashi
  • Publication number: 20210365249
    Abstract: A non-transitory computer-readable recording medium storing a data transformation program that causes a processor to execute a process. The process includes generating a plurality of first programs, each of the first programs transforming first input data and outputting first output data, contents of the transforming by the plurality of the first programs being different from each other, and among a plurality of pieces of a second input data different from the first input data, outputting the second input data that maximizes an entropy of a plurality of pieces of second output data, where each of the first programs transforms the second input data to the second output data.
    Type: Application
    Filed: February 19, 2021
    Publication date: November 25, 2021
    Applicant: FUJITSU LIMITED
    Inventor: Yoshifumi Ujibashi
  • Patent number: 11176177
    Abstract: In a search apparatus, a processing unit obtains input data and output data and stores these data in a storage unit. The processing unit classifies a plurality of data conversion methods into a plurality of groups. With respect to each group, the processing unit produces intermediate data from the input data using the data conversion methods belonging to the group, and evaluates the intermediate data using an evaluation function corresponding to the group, in order to thereby search for a combination of data conversion methods within the group. The processing unit determines a combination of data conversion methods that is able to convert the input data into the output data on the basis of the search results obtained for the plurality of groups.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: November 16, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Yui Noma
  • Publication number: 20210311961
    Abstract: A processor obtains an input dataset and an output dataset. The processor begins a search process that is a process of searching for a data conversion path of converting the input dataset via one or more intermediate datasets to the output dataset and that includes generating a plurality of intermediate datasets from the input dataset with different data conversion methods, filtering the plurality of intermediate datasets to select a next search intermediate dataset, and generating another intermediate dataset from the next search intermediate dataset. The processor outputs two or more intermediate datasets generated in the course of the search process and receives selection information indicating a selection of part of the two or more intermediate datasets. The processor controls the filtering method for selecting the next search intermediate dataset on the basis of the selection information.
    Type: Application
    Filed: June 10, 2021
    Publication date: October 7, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Yui Noma
  • Patent number: 10861585
    Abstract: An information processing apparatus includes a memory and a processor coupled to the memory and configured to extract data having x times y bits from genome data in which a mutation pattern at each gene mutation position is represented as x bits, such that the extracted data is constituted by y data pieces each having x bits at y respective mutation positions, x and y being integers greater than or equal to 1, respectively, to refer to an addend table that stores a plurality of addend data associated with respective x-times-y-bit data to identify addend data corresponding to the extracted data, and to use an SIMD instruction to add the identified addend data to count data at positions corresponding to the y mutation positions in the genome data, the count data indicating counts of occurrences of mutation patterns in the genome data.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: December 8, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Minoru Nakamura
  • Patent number: 10783983
    Abstract: A variant information processing device for processing genetic information includes a processor configured to create variant storage data, from variant information of each of a plurality of target individuals to be processed, where the variant information includes information of variant locus and variant pattern associated with the variant locus. The variant locus corresponds to a portion where the genetic information varies among the plurality of target individuals, the variant pattern corresponds to the genetic information of the portion, and the variant storage data includes an array region with each a first storage region with a fixed bit length and a second storage region with the fixed bit length. The code associated with the variant pattern at each of the variant locus is stored in first storage region or both of the first and second storage regions depending on the length of variant pattern associated with the code.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: September 22, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Motoyuki Kawaba
  • Patent number: 10579605
    Abstract: A variant master table includes respective columns for variant ID, variant pattern, and pattern code. A composite primary key constraint for the variant master table is set by the columns for variant ID and pattern code. The respective processors reads variant information, verifies whether or not variant patterns for variant positions have been entered into the table, and for unentered variant patterns, attempts to insert a row of information into the table that includes the unentered variant pattern, a corresponding variant ID, and a pattern code allocated based on the variant master table. In cases in which the row of information violates a composite primary key constrain, the respective processor reattempts to insert an updated row of information in which the pattern code has been changed. The processors encode the variant information based on information entered into the variant master table.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: March 3, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Yoshifumi Ujibashi
  • Patent number: 10528594
    Abstract: A database system includes a storage device which stores a database storing a plurality of data groups, range information including a minimum and a maximum of an appointed item, a total value and a number of the data, and an information processing device comprises a processor configured to, in response to deletion of a first data, update the total value and the number of the data, calculate a difference between a first total value, based on the number of the data and at least one of the maximum and the minimum in the range information, and a second total value which is updated, as minimum or maximum, judge at least one of whether or not the minimum which is calculated exceeds the minimum in the range information and whether or not the maximum which is calculated is less than the maximum in the range information, and update the range information.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: January 7, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Motoyuki Kawaba
  • Publication number: 20190278785
    Abstract: In a search apparatus, a processing unit obtains input data and output data and stores these data in a storage unit. The processing unit classifies a plurality of data conversion methods into a plurality of groups. With respect to each group, the processing unit produces intermediate data from the input data using the data conversion methods belonging to the group, and evaluates the intermediate data using an evaluation function corresponding to the group, in order to thereby search for a combination of data conversion methods within the group. The processing unit determines a combination of data conversion methods that is able to convert the input data into the output data on the basis of the search results obtained for the plurality of groups.
    Type: Application
    Filed: February 6, 2019
    Publication date: September 12, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Yui Noma
  • Publication number: 20190221284
    Abstract: An information processing apparatus includes a memory; and a processor coupled to the memory and configured to execute processing relating to a plurality of sequences according to a plurality of variant patterns included in each of the plurality of sequences, wherein the executing the processing relating to the plurality of sequences includes: when variant patterns at a same variant position are same among the plurality of sequences, executing processing of exclusion of the same variant patterns from the plurality of sequences, and storing the plurality of sequences for which the processing of exclusion has been executed in the memory.
    Type: Application
    Filed: March 26, 2019
    Publication date: July 18, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Motoyuki Kawaba, Yoshifumi Ujibashi
  • Publication number: 20180239789
    Abstract: A variant master table includes respective columns for variant ID, variant pattern, and pattern code. A composite primary key constraint for the variant master table is set by the columns for variant ID and pattern code. The respective processors reads variant information, verifies whether or not variant patterns for variant positions have been entered into the table, and for unentered variant patterns, attempts to insert a row of information into the table that includes the unentered variant pattern, a corresponding variant ID, and a pattern code allocated based on the variant master table. In cases in which the row of information violates a composite primary key constrain, the respective processor reattempts to insert an updated row of information in which the pattern code has been changed. The processors encode the variant information based on information entered into the variant master table.
    Type: Application
    Filed: February 19, 2018
    Publication date: August 23, 2018
    Applicant: FUJITSU LIMITED
    Inventor: Yoshifumi Ujibashi
  • Publication number: 20180181874
    Abstract: An information processing apparatus is disclosed. A processor acquires an upper limit and a lower limit of a probability of a false positive for each of multiple tests based on data-after-aggregation pertinent to a presence or absence of a specific event occurrence acquired by multiple testing, and sets a value from multiple upper limits being acquired. The processor calculates the probability of the false positive with respect to each of tests having lower limits less than the value, and acquires a set of probabilities of the false positive.
    Type: Application
    Filed: November 10, 2017
    Publication date: June 28, 2018
    Applicant: FUJITSU LIMITED
    Inventors: RYUSUKE NISHIKAWA, Yoshifumi Ujibashi
  • Publication number: 20180082013
    Abstract: An information processing apparatus includes a memory and a processor coupled to the memory and configured to extract data having x times y bits from genome data in which a mutation pattern at each gene mutation position is represented as x bits, such that the extracted data is constituted by y data pieces each having x bits at y respective mutation positions, x and y being integers greater than or equal to 1, respectively, to refer to an addend table that stores a plurality of addend data associated with respective x-times-y-bit data to identify addend data corresponding to the extracted data, and to use an SIMD instruction to add the identified addend data to count data at positions corresponding to the y mutation positions in the genome data, the count data indicating counts of occurrences of mutation patterns in the genome data.
    Type: Application
    Filed: September 11, 2017
    Publication date: March 22, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yoshifumi UJIBASHI, Minoru NAKAMURA
  • Publication number: 20170242588
    Abstract: A variant information processing device for processing genetic information includes a processor configured to create variant storage data, from variant information of each of a plurality of target individuals to be processed, where the variant information includes information of variant locus and variant pattern associated with the variant locus. The variant locus corresponds to a portion where the genetic information varies among the plurality of target individuals, the variant pattern corresponds to the genetic information of the portion, and the variant storage data includes an array region with each a first storage region with a fixed bit length and a second storage region with the fixed bit length. The code associated with the variant pattern at each of the variant locus is stored in first storage region or both of the first and second storage regions depending on the length of variant pattern associated with the code.
    Type: Application
    Filed: February 9, 2017
    Publication date: August 24, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Motoyuki Kawaba
  • Patent number: 9483319
    Abstract: A plurality of compute nodes are divided into a plurality of groups. A maximum available resource amount determining unit determines, for each of the plurality of groups, the available resource amount of the compute node having the greatest available resource amount among the compute nodes belonging to the group as the maximum available resource amount of the group. An excluding unit compares the resource consumption of a job with the maximum available resource amount of each of the plurality of groups, and excludes a group whose maximum available resource amount is less than the resource consumption from search objects. A searching unit searches for a compute node whose available resource amount is greater than or equal to the resource consumption, from the compute nodes belonging to a group that is not excluded from the search objects.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: November 1, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Kohta Nakashima
  • Publication number: 20160267162
    Abstract: A database system includes a storage device which stores a database storing a plurality of data groups, range information including a minimum and a maximum of an appointed item, a total value and a number of the data, and an information processing device comprises a processor configured to, in response to deletion of a first data, update the total value and the number of the data, calculate a difference between a first total value, based on the number of the data and at least one of the maximum and the minimum in the range information, and a second total value which is updated, as minimum or maximum, judge at least one of whether or not the minimum which is calculated exceeds the minimum in the range information and whether or not the maximum which is calculated is less than the maximum in the range information, and update the range information.
    Type: Application
    Filed: March 3, 2016
    Publication date: September 15, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Yoshifumi Ujibashi, Motoyuki Kawaba
  • Patent number: 9342133
    Abstract: An information processing apparatus includes a detection unit and a frequency control unit and is designed to activate power saving control and perform information processing. The detection unit detects an idle time of a processor caused by job scheduling. The frequency control unit reduces the operating frequency of the processor for executing a job scheduled to be executed immediately before the idle time, below the maximum frequency. At this time, the frequency control unit reduces the operating frequency such that the execution time of the job is extended to the execution start time of a waiting job, which is included in the idle time.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: May 17, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Yoshifumi Ujibashi