Abstract: A semiconductor device including: a metal-insulator-semiconductor (MIS) structure that includes a nitride semiconductor layer, a gate insulator film, and a gate electrode stacked in stated order; and a source electrode and a drain electrode that are disposed to sandwich the gate electrode in a plan view and contact the nitride semiconductor layer. The gate insulator film includes a threshold value control layer that includes an oxynitride film.

Abstract: A semiconductor device including: a metal-insulator-semiconductor (MIS) structure that includes a nitride semiconductor layer, a gate insulator film, and a gate electrode stacked in stated order; and a source electrode and a drain electrode that are disposed to sandwich the gate electrode in a plan view and contact the nitride semiconductor layer. The gate insulator film includes a threshold value control layer that includes an oxynitride film.

Abstract: A semiconductor device includes: a channel layer made of GaN; a barrier layer formed on the channel layer, the bather layer being made of AlGaN and having a larger band gap than the channel layer; a p-type GaN layer selectively formed on the barrier layer; a gate electrode made of ITO on the p-type GaN layer; and a source electrode and a drain electrode on regions of the barrier layer laterally outward of the gate electrode. The width of the gate electrode in the gate length direction is smaller than or equal to the width of the p-type GaN layer in the gate length direction, and the difference between the width of the gate electrode in the gate length direction and the width of the p-type GaN layer in the gate length direction is less than or equal to 0.2 ?m.

Abstract: An object is to achieve an increase in gain by reducing a current collapse, and reducing Cgd and Rg. A semiconductor device according to the present invention includes a substrate; a first semiconductor layer disposed on the substrate and made of a Group III nitride semiconductor; a second semiconductor layer disposed on the first semiconductor layer and made of a Group III nitride semiconductor; a gate electrode, a source electrode, and a drain electrode disposed on the second semiconductor layer; a first field plate electrode disposed on the second semiconductor layer; and a second field plate electrode disposed on the first field plate electrode, in which the first field plate electrode and the second field plate electrode are disposed between the gate electrode and the drain electrode.

Abstract: A nitride semiconductor device of the present invention has a source-electrode-side insulator protection film layer disposed between a source electrode and a drain electrode on a second nitride semiconductor layer and formed at least partially covering the source electrode, a drain-electrode-side insulator protection film layer disposed separately from the source-electrode-side insulator protection film layer and formed at least partially covering the drain electrode, and a gate layer formed in contact with the second nitride semiconductor layer between the source-electrode-side insulator protection film layer and the drain-electrode-side insulator protection film layer and made of a p-type metal oxide semiconductor, and the gate layer has regions opposite to the second nitride semiconductor layer across each of the source-electrode-side insulator protection film layer and the drain-electrode-side insulator protection film layer and a region in contact with the second nitride semiconductor layer.

Abstract: A nitride semiconductor device of the present invention has a source-electrode-side insulator protection film layer disposed between a source electrode and a drain electrode on a second nitride semiconductor layer and formed at least partially covering the source electrode, a drain-electrode-side insulator protection film layer disposed separately from the source-electrode-side insulator protection film layer and formed at least partially covering the drain electrode, and a gate layer formed in contact with the second nitride semiconductor layer between the source-electrode-side insulator protection film layer and the drain-electrode-side insulator protection film layer and made of a p-type metal oxide semiconductor, and the gate layer has regions opposite to the second nitride semiconductor layer across each of the source-electrode-side insulator protection film layer and the drain-electrode-side insulator protection film layer and a region in contact with the second nitride semiconductor layer.

Abstract: A Schottky diode has: a semiconductor layer stack including a GaN layer formed over a substrate and an AlGaN layer formed on the GaN layer and having a wider bandgap than the GaN layer; an anode electrode and a cathode electrode which are formed at an interval therebetween on the semiconductor layer stack; and a block layer formed in a region between the anode electrode and the cathode electrode so as to contact the AlGaN layer. A part of the anode electrode is formed on the block layer so as not to contact the surface of the AlGaN layer. The barrier height between the anode electrode and the block layer is greater than that between the anode electrode and the AlGaN layer.

Abstract: An object is to achieve an increase in gain by reducing a current collapse, and reducing Cgd and Rg. A semiconductor device according to the present invention includes a substrate; a first semiconductor layer disposed on the substrate and made of a Group III nitride semiconductor; a second semiconductor layer disposed on the first semiconductor layer and made of a Group III nitride semiconductor; a gate electrode, a source electrode, and a drain electrode disposed on the second semiconductor layer; a first field plate electrode disposed on the second semiconductor layer; and a second field plate electrode disposed on the first field plate electrode, in which the first field plate electrode and the second field plate electrode are disposed between the gate electrode and the drain electrode.

Abstract: A field effect transistor includes a nitride semiconductor multilayer structure formed on a substrate, a source electrode, a drain electrode, a gate electrode, an insulating film formed on the nitride semiconductor multilayer structure, and a field plate formed on and in contact with the insulating film, and having an end located between the gate electrode and the drain electrode. The insulating film includes a first film, and a second film having a dielectric breakdown voltage lower than that of the first film, and a thin film portion formed between the gate electrode and the drain electrode is formed in the insulating film. The field plate covers the thin film portion, and is connected to the source electrode in an opening.

Abstract: A nitride semiconductor device includes a semiconductor substrate, and a nitride semiconductor layer formed on the semiconductor substrate. The semiconductor substrate includes a normal region and an interface current block region surrounding the normal region. The nitride semiconductor layer includes an element region and an isolation region surrounding the element region. The element region is formed over the normal region. The interface current block region contains impurities, and forms a potential barrier against carriers generated at an interface between the nitride semiconductor layer and the semiconductor substrate.

Abstract: A nitride semiconductor device includes: first electrode interconnect layers extending in parallel with one another over the nitride semiconductor layer and divided by areas extending across a longitudinal direction of the first electrode interconnect layers; first gate electrodes extending along the first electrode interconnect layers; first gate electrode connecting interconnects extending in associated ones of the areas dividing the first electrode interconnect layers and being in connection to the first gate electrodes; first electrode connecting interconnects formed above the first gate electrode connecting interconnects and being in connection to the first electrode interconnect layers; a first electrode upper interconnects formed on the first electrode connecting interconnects with an interconnect insulating film interposed therebetween, and being in connection to the first electrode connecting interconnects through associated ones of openings of the interconnect insulating film.

Abstract: A semiconductor device includes: a second nitride semiconductor layer formed on a first nitride semiconductor layer, and having a larger band gap than the first nitride semiconductor layer; and an electrode filling a recess formed in the first and second nitride semiconductor layers. The first nitride semiconductor layer has a two-dimensional electron gas layer immediately below the second nitride semiconductor layer. The electrode and the second nitride semiconductor layer are in contact with each other at a first contact interface. The electrode and a portion of the first nitride semiconductor layer corresponding to the two-dimensional electron gas layer are in contact with each other at a second contact interface connected below the first contact interface. The first contact interface is formed such that a width of the recess increases upward. The second contact interface is more steeply inclined than the first contact interface.

Abstract: A nitride semiconductor device includes: first electrode interconnect layers extending in parallel with one another over the nitride semiconductor layer and divided by areas extending across a longitudinal direction of the first electrode interconnect layers; first gate electrodes extending along the first electrode interconnect layers; first gate electrode connecting interconnects extending in associated ones of the areas dividing the first electrode interconnect layers and being in connection to the first gate electrodes; first electrode connecting interconnects formed above the first gate electrode connecting interconnects and being in connection to the first electrode interconnect layers; a first electrode upper interconnects formed on the first electrode connecting interconnects with an interconnect insulating film interposed therebetween, and being in connection to the first electrode connecting interconnects through associated ones of openings of the interconnect insulating film.

Abstract: A semiconductor device includes: a channel layer made of GaN; a barrier layer formed on the channel layer, the bather layer being made of AlGaN and having a larger band gap than the channel layer; a p-type GaN layer selectively formed on the barrier layer; a gate electrode made of ITO on the p-type GaN layer; and a source electrode and a drain electrode on regions of the barrier layer laterally outward of the gate electrode. The width of the gate electrode in the gate length direction is smaller than or equal to the width of the p-type GaN layer in the gate length direction, and the difference between the width of the gate electrode in the gate length direction and the width of the p-type GaN layer in the gate length direction is less than or equal to 0.2 ?m.

Abstract: A Schottky diode has: a semiconductor layer stack including a GaN layer formed over a substrate and an AlGaN layer formed on the GaN layer and having a wider bandgap than the GaN layer; an anode electrode and a cathode electrode which are formed at an interval therebetween on the semiconductor layer stack; and a block layer formed in a region between the anode electrode and the cathode electrode so as to contact the AlGaN layer. A part of the anode electrode is formed on the block layer so as not to contact the surface of the AlGaN layer. The barrier height between the anode electrode and the block layer is greater than that between the anode electrode and the AlGaN layer.

Abstract: A nitride semiconductor device includes a semiconductor substrate, and a nitride semiconductor layer formed on the semiconductor substrate. The semiconductor substrate includes a normal region and an interface current block region surrounding the normal region. The nitride semiconductor layer includes an element region and an isolation region surrounding the element region. The element region is formed over the normal region. The interface current block region contains impurities, and forms a potential barrier against carriers generated at an interface between the nitride semiconductor layer and the semiconductor substrate.

Abstract: The present invention has as an object to provide a FET having low on-resistance. The FET according to the present invention includes: first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a higher band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer; a fourth nitride semiconductor layer formed on the third nitride semiconductor layer and having a higher band gap energy than the third nitride semiconductor layer. A channel is formed in a heterojunction interface between the first nitride semiconductor layer and the second nitride semiconductor layer.

Abstract: A semiconductor device which includes both an E-FET and a D-FET and can facilitate control of the Vth in an E-FET and suppress a decrease in the Vf, and a manufacturing method of the same are provided. A semiconductor device which includes both an E-FET and a D-FET on the same semiconductor substrate includes: a first threshold adjustment layer for adjusting threshold of the E-FET; a first etching stopper layer formed on the first threshold adjustment layer; the second threshold adjustment layer formed on the first etching stopper layer for adjusting threshold of the D-FET; a second etching stopper layer formed on the second threshold adjustment layer; a first gate electrode penetrating through the first etching stopper layer, the second threshold adjustment layer, and the second etching stopper layer, which is in contact with the first threshold adjustment layer; and the second gate electrode penetrating through the second etching stopper layer, which is in contact with the second threshold adjustment layer.

Abstract: A multilayer structure including a first electron supply layer and a second electron supply layer is used for an electron supply layer. A multilayer structure including an SiN film and an SiO2 film is used for an insulating film to be formed on the surface of a semiconductor. In forming an opening for exposing the electron supply layer in the insulating film, the SiN film that is in contact with the semiconductor is side-etched. Accordingly, it is possible to avoid a contact between a gate electrode and a portion, which is located on the side of the electron supply layer, of the inner peripheral surface of the opening, and further to expose only the second electron supply layer in the vicinity of the gate electrode.

Abstract: A semiconductor device in which an E-FET and a D-FET are integrated on the same substrate, wherein an epitaxial layer includes, in the following order from the semiconductor substrate: a first threshold adjustment layer that adjusts a threshold voltage of a gate of the E-FET and a threshold voltage of a gate of the D-FET; a first etching-stopper layer that stops etching performed from an uppermost layer to a layer abutting on the first etching-stopper layer; a second threshold adjustment layer that adjusts the threshold voltage of the gate of the D-FET; and a second etching-stopper layer that stops the etching performed from the uppermost layer to a layer abutting on the second etching-stopper layer, and at least one of the first etching-stopper layer and the second threshold adjustment layer includes an n-type doped region.