Patents by Inventor Yoshiharu Fukasawa

Yoshiharu Fukasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7153589
    Abstract: A Mo—W material for the formation of wirings is discloses which, as viewed integrally, comprises 20 to 95% of tungsten and the balance of molybdenum and inevitable impurities by atomic percentage. The Mo—W material for wirings is a product obtained by compounding and integrating a Mo material and a W material as by the powder metallurgy technique or the smelting technique or a product obtained by arranging these materials in amounts calculated to account for the percentage composition mentioned above. The Mo—W material containing W in a proportion in the range of from 20 to 95% manifests low resistance and, at the same time, excels in workability and tolerance for etchants. The wiring thin film which is formed of the Mo—W alloy of this percentage composition is used as address wirings and others for liquid crystal display devices.
    Type: Grant
    Filed: October 6, 1998
    Date of Patent: December 26, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Kohsaka, Yoshiharu Fukasawa, Yoshiko Tsuji, Mitsushi Ikeda, Michio Sato, Toshihiro Maki
  • Patent number: 6352628
    Abstract: A refractory metal silicide target is characterized by comprising a fine mixed structure composed of MSi2 (where M: refractory metal) grains and Si grains, wherein the number of MSi2 grains independently existing in a cross section of 0.01 mm2 of the mixed structure is not greater than 15, the MSi2 grains have an average grain size not greater than 10 &mgr;m, whereas free Si grains existing in gaps of the MSi2 grains have a maximum grain size not greater than 20 &mgr;m. The target has a high density, high purity fine mixed structure with a uniform composition and contains a small amount of impurities such as oxygen etc. The employment of the target can reduce particles produced in sputtering, the change of a film resistance in a wafer and the impurities in a film and improve yield and reliability when semiconductors are manufactured.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: March 5, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Michio Sato, Takashi Yamanobe, Tohru Komatsu, Yoshiharu Fukasawa, Noriaki Yagi, Toshihiro Maki, Hiromi Shizu
  • Publication number: 20010037938
    Abstract: A refractory metal silicide target is characterized by comprising a fine mixed structure composed of MSi2 (where M: refractory metal) grains and Si grains, wherein the number of MSi2 grains independently existing in a cross section of 0.01 mm2 of the mixed structure is not greater than 15, the MSi2 grains have an average grain size not greater than 10 &mgr;m, whereas free Si grains existing in gaps of the MSi2 grains have a maximum grain size not greater than 20 &mgr;m. The target has a high density, high purity fine mixed structure with a uniform composition and contains a small amount of impurities such as oxygen etc. The employment of the target can reduce particles produced in sputtering, the change of a film resistance in a wafer and the impurities in a film and improve yield and reliability when semiconductors are manufactured.
    Type: Application
    Filed: May 2, 2001
    Publication date: November 8, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Michio Sato, Takashi Yamanobe, Tohru Komatsu, Yoshiharu Fukasawa, Noriaki Yagi, Toshihiro Maki, Hiromi Shizu
  • Patent number: 6309593
    Abstract: A refractory metal silicide target is characterized by comprising a fine mixed structure composed of MSi2 (where M: refractory metal) grains and Si grains, wherein the number of MSi2 grains independently existing in a cross section of 0.01 mm2 of the mixed structure is not greater than 15, the MSi2 grains have an average grain size not greater than 10 &mgr;m, whereas free Si grains existing in gaps of the MSi2 grains have a maximum grain size not greater than 20 &mgr;m. The target has a high density, high purity fine mixed structure with a uniform composition and contains a small amount of impurities such as oxygen etc. The employment of the target can reduce particles produced in sputtering, the change of a film resistance in a wafer and the impurities in a film and improve yield and reliability when semiconductors are manufactured.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: October 30, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Michio Sato, Takashi Yamanobe, Tohru Komatsu, Yoshiharu Fukasawa, Noriaki Yagi, Toshihiro Maki, Hiromi Shizu
  • Patent number: 6200694
    Abstract: A Mo—W material for the formation of wirings is discloses which, as viewed integrally, comprises 20 to 95% of tungsten and the balance of molybdenum and inevitable impurities by atomic percentage. The Mo—W material for wirings is a product obtained by compounding and integrating a Mo material and a W material as by the powder metallurgy technique or the smelting technique or a product obtained by arranging these materials in amounts calculated to account for the percentage composition mentioned above. The Mo—W material containing W in a proportion in the range of from 20 to 95% manifests low resistance and, at the same time, excels in workability and tolerance for etchants. The wiring thin film which is formed of the Mo—W alloy of this percentage composition is used as address wirings and others for liquid crystal display devices.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: March 13, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Kohsaka, Yoshiharu Fukasawa, Yoshiko Tsuji, Mitsushi Ikeda, Michio Sato, Toshihiro Maki
  • Patent number: 5913100
    Abstract: A Mo-W material for the formation of wirings is discloses which, as viewed integrally, comprises 20 to 95% of tungsten and the balance of molybdenum and inevitable impurities by atomic percentage. The Mo-W material for wirings is a product obtained by compounding and integrating a Mo material and a W material as by the powder metallurgy technique or the smelting technique or a product obtained by arranging these materials in amounts calculated to account for the percentage composition mentioned above. The Mo-W material containing W in a proportion in the range of from 20 to 95% manifests low resistance and, at the same time, excels in workability and tolerance for etchants. The wiring thin film which is formed of the Mo-W alloy of this percentage composition is used as address wirings and others for liquid crystal display devices.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: June 15, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuo Kohsaka, Yoshiharu Fukasawa, Yoshiko Tsuji, Mitsushi Ikeda, Michio Sato, Toshihiro Maki
  • Patent number: 5512155
    Abstract: A film forming apparatus such as a sputtering apparatus, a vacuum evaporation apparatus, or a CVD apparatus, having a film forming substrate and a film forming source both arranged within a film forming chamber, for forming a thin film on the film forming substrate. This film forming apparatus has within the film forming chamber a apparatus part other than the film forming substrate on which a component of the film forming source, e.g., a target, is deposited. At least on the surface of the apparatus part on which the component of the film forming source is deposited is composed of a material whose thermal expansion coefficient is equal or close to that of the thin film to be formed. Even if the component of the film forming source forms a deposition on the apparatus part other than the film forming substrate, the separation of such a deposition due to a thermal stress can be controlled because the thermal expansion coefficients of the deposition and apparatus part are equal or close to each other.
    Type: Grant
    Filed: December 29, 1994
    Date of Patent: April 30, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshiharu Fukasawa
  • Patent number: 5190630
    Abstract: The present invention consists of a sputtering target wherein target pieces made of at least two different kinds of materials are compositely arrayed in a manner as to be divided into the respective materials, characterized by having at least one irregular erosion region which is defined as a region enclosed with a circle having an erosion width as its diameter, located at a region farthest from the center of gravity of the sputtering target within a region to be eroded in a curvilinear shape, the irregular erosion region being formed at least partly of target pieces made of at least two kinds of materials having either shapes or surface areas thereof different from those of the target pieces lying outside the irregular erosion region and are compositely arrayed in a manner as to be divided into the respective materials.
    Type: Grant
    Filed: April 7, 1992
    Date of Patent: March 2, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Makoto Kikuchi, Yoshiharu Fukasawa, Hideo Ishihara
  • Patent number: 4966676
    Abstract: A sputtering target divided into respective target elements of two or more types arranged as a composite on a substrate, is disclosed. A thin sheet whose constituent material comprises one or more of the constituent materials of the target elements, and whose constituent material includes at least one metal material, is interposed between said substrate and target elements.
    Type: Grant
    Filed: May 1, 1989
    Date of Patent: October 30, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiharu Fukasawa, Satoshi Yamaguchi, Hideo Ishihara
  • Patent number: 4963240
    Abstract: The present invention is a sputtering target for formation of an alloy film, which comprises 15 to 50 atomic percent of molybdenum or tungsten, the remaining atomic percent of tantalum, and concomitant impurities, which can provide electrical wiring having very low specific resistance as well as excellent workability and stability, whereby high definition and high integration of various elements such as semiconductor devices can be achieved. In consequence, it is fair to say that this invention is industrially very useful.
    Type: Grant
    Filed: March 29, 1988
    Date of Patent: October 16, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiharu Fukasawa, Mituo Kawai, Hideo Ishihara, Takenori Umeki, Yasuhisa Oana
  • Patent number: 4842706
    Abstract: Disclosed is a sputtering target which comprises a single block composed of one or more of metals prepared by a melting process or an alloy thereof; a combined block of the plural single blocks; or a combined block of the single blocks and silicon blocks; an average size of the crystal grains of the metal or the alloy being between 1 .mu.m and 1 mm.
    Type: Grant
    Filed: March 2, 1988
    Date of Patent: June 27, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiharu Fukasawa, Mituo Kawai, Hideo Ishihara, Takashi Yamanobe
  • Patent number: 4514234
    Abstract: A molybdenum board which has excellent strength at high temperatures. The molybdenum board consists essentially of molybdenum recrystallized grains having a ratio L/W (L: length; W: width) of 2 or more and the width W of 5 to 1,000 .mu.m and containing 0.005 to 0.75% by weight of at least one element selected from Al, Si and K.
    Type: Grant
    Filed: February 9, 1984
    Date of Patent: April 30, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yoshiharu Fukasawa, Tatsuhiko Matsumoto, Mituo Kawai, Shigeru Ueda, Hideo Koizumi, Hiroyuki Saitou