Patents by Inventor Yoshiharu Kuwana
Yoshiharu Kuwana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9685394Abstract: An electronic device includes a semiconductor substrate, an insulating material-filled layer and a vertical conductor. The semiconductor substrate has a vertical hole extending in a thickness direction thereof. The insulating material-filled layer is a ring-shaped layer filled in the vertical hole for covering an inner periphery thereof and includes an organic insulating material or an inorganic insulating material mainly of a glass and a nanocomposite ceramic. The nanocomposite ceramic has a specific resistance of greater than 1014 ?·cm at room temperature and a relative permittivity of 4 to 9. The vertical conductor is a solidified metal body filled in an area surrounded by the insulating material-filled layer.Type: GrantFiled: May 13, 2011Date of Patent: June 20, 2017Assignee: NAPRA CO., LTD.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Patent number: 8766312Abstract: A light-emitting device includes a light-emitting element and a support substrate. The light-emitting element has an insulating layer and first and second vertical conductors passing through the insulating layer. The support substrate has a substrate part and first and second through electrodes and is disposed on the insulating layer. The first through electrode passes through the substrate part with one end connected to an opposing end of the first vertical conductor, while the second through electrode passes through the substrate part with one end connected to an opposing end of the second vertical conductor. The opposing ends of the first and second vertical conductors are projected from a surface of the insulating layer and connected to the ends of the first and second through electrode inside the support substrate.Type: GrantFiled: October 19, 2011Date of Patent: July 1, 2014Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana, Kazutoshi Kamibayashi
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Patent number: 8759211Abstract: A method includes applying, between connection conductors of adjacent substrates, a junction material containing the first metal or alloy component and the second metal or alloy component having a higher melting point than said first metal or alloy component. The method further includes melting the junction material by a heat treatment.Type: GrantFiled: March 11, 2013Date of Patent: June 24, 2014Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana, Ryuji Kimura
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Patent number: 8609999Abstract: A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.Type: GrantFiled: January 31, 2011Date of Patent: December 17, 2013Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Patent number: 8580581Abstract: A method for manufacturing an electronic device, including a step of aligning and stacking a plurality of substrates, each of the plurality of substrates having a plurality of vertical conductors and magnetic films, the vertical conductors being directed along a thickness direction of the substrate and distributed in a row with respect to a substrate surface, the magnetic films being disposed in place on the substrate surface in a predetermined positional relationship with the vertical conductors, upon aligning the plurality of substrates, the electronic device manufacturing method including a step of applying an external magnetic field to produce a magnetic attractive force between the magnetic films of adjacent stacked substrates and align the vertical conductors by the magnetic attractive force.Type: GrantFiled: November 10, 2010Date of Patent: November 12, 2013Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Publication number: 20130186943Abstract: A method includes applying, between connection conductors of adjacent substrates, a junction material containing the first metal or alloy component and the second metal or alloy component having a higher melting point than said first metal or alloy component. The method further includes melting the junction material by a heat treatment.Type: ApplicationFiled: March 11, 2013Publication date: July 25, 2013Inventors: Shigenobu SEKINE, Yurina Sekine, Yoshiharu Kuwana, Ryuji Kimura
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Patent number: 8415784Abstract: An electronic device includes a plurality of stacked substrates. Each of the substrates includes a semiconductor substrate, a columnar conductor, and a ring-shaped insulator. The columnar conductor extends along a thickness direction of the semiconductor substrate. The ring-shaped insulator includes an inorganic insulating layer mainly composed of a glass. The inorganic insulating layer fills a ring-shaped groove that is provided in the semiconductor substrate to surround the columnar conductor.Type: GrantFiled: May 28, 2010Date of Patent: April 9, 2013Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana, Ryuji Kimura
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Patent number: 8377565Abstract: A filling material includes a support base member and a metal layer, the metal layer including a first metal layer and a second metal layer and being disposed on one side of the support base member, the first metal layer being an aggregate of nano metal particles and having a film thickness enabling melting at a temperature lower than a melting point, the second metal layer being an aggregate of metal particles having a lower melting point than the first metal layer.Type: GrantFiled: April 12, 2011Date of Patent: February 19, 2013Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Patent number: 8217280Abstract: A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.Type: GrantFiled: January 31, 2011Date of Patent: July 10, 2012Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Publication number: 20120091481Abstract: A light-emitting device includes a light-emitting element and a support substrate. The light-emitting element has an insulating layer and first and second vertical conductors passing through the insulating layer. The support substrate has a substrate part and first and second through electrodes and is disposed on the insulating layer. The first through electrode passes through the substrate part with one end connected to an opposing end of the first vertical conductor, while the second through electrode passes through the substrate part with one end connected to an opposing end of the second vertical conductor. The opposing ends of the first and second vertical conductors are projected from a surface of the insulating layer and connected to the ends of the first and second through electrode inside the support substrate.Type: ApplicationFiled: October 19, 2011Publication date: April 19, 2012Applicant: NAPRA CO., LTD.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana, Kazutoshi Kamibayashi
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Publication number: 20110284912Abstract: An electronic device includes a semiconductor substrate, an insulating material-filled layer and a vertical conductor. The semiconductor substrate has a vertical hole extending in a thickness direction thereof. The insulating material-filled layer is a ring-shaped layer filled in the vertical hole for covering an inner periphery thereof and includes an organic insulating material or an inorganic insulating material mainly of a glass and a nanocomposite ceramic. The nanocomposite ceramic has a specific resistance of greater than 1014 ?·cm at room temperature and a relative permittivity of 4 to 9. The vertical conductor is a solidified metal body filled in an area surrounded by the insulating material-filled layer.Type: ApplicationFiled: May 13, 2011Publication date: November 24, 2011Applicant: NAPRA CO., LTD.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Publication number: 20110262762Abstract: A filling material includes a support base member and a metal layer, the metal layer including a first metal layer and a second metal layer and being disposed on one side of the support base member, the first metal layer being an aggregate of nano metal particles and having a film thickness enabling melting at a temperature lower than a melting point, the second metal layer being an aggregate of metal particles having a lower melting point than the first metal layer.Type: ApplicationFiled: April 12, 2011Publication date: October 27, 2011Applicant: NAPRA CO., LTD.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Publication number: 20110232740Abstract: A solar cell includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, a first electrode, and a second electrode. The first conductivity-type semiconductor layer has a front side intended to serve as a light-receiving surface. The second conductivity-type semiconductor layer is disposed on a back side of the first conductivity-type semiconductor layer, forming a p-n junction together with the first conductivity-type semiconductor layer. The first electrode passes through the second conductivity-type semiconductor layer toward the first conductivity-type semiconductor layer with a tip extending into and ending within the first conductivity-type semiconductor layer. The second electrode is disposed at a back side of the solar cell.Type: ApplicationFiled: February 10, 2011Publication date: September 29, 2011Applicant: Napra Co., Ltd.Inventors: Shigenobu SEKINE, Yurina Sekine, Yoshiharu Kuwana
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Publication number: 20110140281Abstract: A method for manufacturing an electronic device, including a step of aligning and stacking a plurality of substrates, each of the plurality of substrates having a plurality of vertical conductors and magnetic films, the vertical conductors being directed along a thickness direction of the substrate and distributed in a row with respect to a substrate surface, the magnetic films being disposed in place on the substrate surface in a predetermined positional relationship with the vertical conductors, upon aligning the plurality of substrates, the electronic device manufacturing method including a step of applying an external magnetic field to produce a magnetic attractive force between the magnetic films of adjacent stacked substrates and align the vertical conductors by the magnetic attractive force.Type: ApplicationFiled: November 10, 2010Publication date: June 16, 2011Applicant: Napra Co., Ltd.Inventors: Shigenobu SEKINE, Yurina Sekine, Yoshiharu Kuwana
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Publication number: 20110141704Abstract: A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.Type: ApplicationFiled: January 31, 2011Publication date: June 16, 2011Applicant: Napra Co., Ltd.Inventors: Shigenobu SEKINE, Yurina SEKINE, Yoshiharu KUWANA
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Publication number: 20110120759Abstract: A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.Type: ApplicationFiled: January 31, 2011Publication date: May 26, 2011Applicant: Napra Co., Ltd.Inventors: Shigenobu SEKINE, Yurina SEKINE, Yoshiharu KUWANA
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Patent number: 7910837Abstract: A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.Type: GrantFiled: July 28, 2008Date of Patent: March 22, 2011Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Publication number: 20100301485Abstract: An electronic device includes a plurality of stacked substrates. Each of the substrates includes a semiconductor substrate, a columnar conductor, and a ring-shaped insulator. The columnar conductor extends along a thickness direction of the semiconductor substrate. The ring-shaped insulator includes an inorganic insulating layer mainly composed of a glass. The inorganic insulating layer fills a ring-shaped groove that is provided in the semiconductor substrate to surround the columnar conductor.Type: ApplicationFiled: May 28, 2010Publication date: December 2, 2010Applicant: Napra Co., Ltd.Inventors: Shigenobu SEKINE, Yurina SEKINE, Yoshiharu KUWANA, Ryuji KIMURA
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Patent number: 7842958Abstract: A light-emitting diode includes a substrate, a semiconductive light-emitting layer, and electrodes. The semiconductive light-emitting layer is deposited on one side of the substrate. The electrodes are composed of a conductive material filled in pores leading to the semiconductive light-emitting layer through the substrate. The semiconductive light-emitting layer includes sequentially deposited n-type and p-type semiconductive layers. The electrodes include n-side and p-side electrodes. One of the n-side and p-side electrodes penetrates through one of the n-type and p-type semiconductive layers, which is disposed closer to the substrate but not targeted for connection, and terminates with a tip thereof located within the other semiconductive layer. The other of the n-side and p-side electrodes penetrates through the substrate from the other side opposite to the one side of the substrate and terminates with a tip thereof located within the one semiconductive layer disposed closer to the substrate.Type: GrantFiled: April 2, 2010Date of Patent: November 30, 2010Assignee: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana
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Publication number: 20100031501Abstract: A method for filling a through hole or a non-through hole formed on a board with a fluent filler comprises combining at least one filling method selected from a centrifugal filling method and a magnetic filling method with an ultrasonic filling method.Type: ApplicationFiled: August 8, 2008Publication date: February 11, 2010Applicant: Napra Co., Ltd.Inventors: Shigenobu Sekine, Yurina Sekine, Yoshiharu Kuwana