Patents by Inventor Yoshiharu Saitoh

Yoshiharu Saitoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6049126
    Abstract: A semiconductor module, includes a circuit including a plurality of semiconductor devices connected together as a package, wherein the plurality of semiconductor devices have a same device structure. Further, an amplifier includes a cascade-connection of a plurality of semiconductor device packages, wherein the plurality of semiconductor devices have a same device structure. Preferably, the devices include field-effect transistors (FETs), and an external input lead of a semiconductor package is connected to an input stage of the amplifier, an interstage circuit is connected between an intermediate output lead and an intermediate input lead, and an external output lead is connected to an output stage of the amplifier.
    Type: Grant
    Filed: December 16, 1996
    Date of Patent: April 11, 2000
    Assignee: NEC Corporation
    Inventor: Yoshiharu Saitoh
  • Patent number: 5858824
    Abstract: A dielectric film is formed on a semiconductor substrate, and on the dielectric film an inorganic dielectric mask film is deposited by CVD. The mask film comprises a first component which is relatively high in etch rate by isotropic plasma etching and a second component relatively low in etch rate, and the content of the first component is linearly gradient in the film thickness direction so as to become lowest at the interface between the mask film and the underlying dielectric film. For example, the mask film is a phosphosilicate glass (P.sub.2 O.sub.5 --SiO.sub.2) film. A resist film is formed on the mask film, and a window is opened in the resist film by electron beam lithography. Then a window is opened in the mask film by isotropic plasma etching, and the underlying dielectric film is also etched to form a window under the window in the mask film.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: January 12, 1999
    Assignee: NEC Corporation
    Inventor: Yoshiharu Saitoh
  • Patent number: 5492864
    Abstract: An object of the present invention is to realize a method of and equipment for manufacturing a semiconductor device which can improve the flatness of an interlayer insulating film and increase the reliability of the metal wiring of a second layer to be formed in a succeeding process. The method of manufacturing the semiconductor device of the present invention is characterized by a manufacturing process to be successively implemented comprising: a step for forming an insulating film by means of a chemical vapor deposition method on a semiconductor substrate having an electrode patterned thereon; a step for selectively removing the insulating film by using a reactive ion etching method and forming a side wall made of the insulating film on the patterned electrode; and a step for forming the insulating film by means of the chemical vapor deposition method while introducing excited halogen molecules at an excited molecule oscillation level.
    Type: Grant
    Filed: August 22, 1994
    Date of Patent: February 20, 1996
    Assignee: NEC Corporation
    Inventor: Yoshiharu Saitoh