Abstract: An optimization device of a program, the optimization device includes a memory to store a source code; and a processor that detects a structure or an array having a member targeted for access in a loop processing from the source code, inserts a first code declaring a pointer variable and a second code that sets an address of the structure or the array in the pointer variable before the loop processing of the source code, and replaces a code which accesses the member in the loop processing with a third code accessing the member based on the pointer variable.

Abstract: A heat insulation chamber according to the present invention is a heat insulation chamber which is made of heat insulating material and forms an inner chamber for accommodating an electronic part. This heat insulation chamber achieves coupling between the electronic part accommodated in the inner chamber formed within a cabinet and the outside of the cabinet by a radio transmission path or a coupling path by static coupling or inductive coupling. A thermostatic chamber and a cryostat according to the present invention comprise the aforementioned heat insulation chamber, a heat exchanger mounted in the heat insulation chamber, and a thermoregulator which maintains the temperature of the inner chamber accommodating the electronic part at an operating temperature of the electronic part through the heat exchanger.

Abstract: A clock signal regenerating circuit is provided for use in a receiver for receiving a burst signal or packet signal which is intermittently transmitted in digital radio communications, wherein a regenerated clock signal can be synchronized with a received signal having a short preamble. An edge extracting unit extracts an edge of the received signal and thereby detects synchronization timing involved in the received signal. A reference signal generating unit previously generates a plurality of quasi-reference signals having respective different phases and an identical frequency, and a selecting/outputting unit selects a quasi-reference signal having a phase closest to the synchronization timing involved in the received signal from among the quasi-reference signals, and outputs the selected signal as a clock signal for the receiver.