Patents by Inventor Yoshihide Uematsu

Yoshihide Uematsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICE WITH HIGH RESISTANCE ELEMENT AND PROCESS FOR MANUFACTURING THE SAME
    Publication number: 20020003311
    Abstract: A high resistance element which is a loading resistor of a SRAM is produced from a high resistance film composed of a SIPOS film in such a manner that the high resistance film is in contact with a junction region formed of a low resistance polysilicon film. This structure ensures that the resistance of a joint portion of the high resistance element of a semiconductor device can be reduced.
    Type: Application
    Filed: June 9, 1998
    Publication date: January 10, 2002
    Inventor: YOSHIHIDE UEMATSU
  • Semiconductor integrated circuit device having dummy pattern effective against micro loading effect
    Patent number: 5598010
    Abstract: A semiconductor integrated circuit device has a test component associated with a dummy test pattern for evaluating corresponding circuit components of the integrated circuit, and the test component and the dummy test pattern is surrounded by a peripheral dummy pattern so that a micro loading effect on the test component is equivalent to the corresponding circuit components.
    Type: Grant
    Filed: May 16, 1996
    Date of Patent: January 28, 1997
    Assignee: NEC Corporation
    Inventor: Yoshihide Uematsu