Abstract: In a computer system, a control signal line directly connecting a processor to a power sequence controller is provided and a PSC interface for exchanging a control signal with the power sequence controller is built in the processor. When all the devices connected to a specific IO bus have been out of use for a long time, the processor transmits a control signal to stop the supply of power to the IO bus to the power sequence controller. This stops power from being supplied to not only the devices connected to the IO bus but also the IO bus. As a result, the unnecessarily consumed power in the computer system is reduced remarkably.

Abstract: When a signal A is input to a bi-directional buffer from a bus A, a first buffer detects the level of the signal A and supplies an OE control signal to a second buffer to disable an output therefrom. The output from the second buffer is set to a predetermined value by a bias circuit, and this predetermined value is supplied to the bi-directional buffer as a direction control signal via a direction designator together with output signal from the first buffer. In this circuit operation, when the signal A is input to the bi-directional buffer, it is immediately transmitted from the bus A side to the bus B side since the bi-directional buffer is set in an initial state by the bias circuit so as to transmit a signal in two directions.