Patents by Inventor Yoshihiro Hisa
Yoshihiro Hisa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9329077Abstract: A semiconductor photodetector device includes a header, a high frequency amplifier, and a submount having a top surface. The high frequency amplifier is located on the header and has a top surface with a high frequency grounding pad disposed on the top surface of the amplifier. First and second electrode pads are located on the top surface of the submount. A semiconductor photodetector having a footprint smaller than the first electrode pad is bonded to the first electrode pad. The high frequency grounding pad is connected to the second electrode pad by a wire.Type: GrantFiled: October 29, 2013Date of Patent: May 3, 2016Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yuji Masuyama, Masaharu Nakaji, Yoshihiro Hisa
-
Publication number: 20140224967Abstract: A semiconductor photodetector device includes a header, a high frequency amplifier, and a submount having a top surface. The high frequency amplifier is located on the header and has a top surface with a high frequency grounding pad disposed on the top surface of the amplifier. A semiconductor photodetector having a footprint smaller than the top surface of the submount is located on the top surface of the submount. The top surface of the submount has thereon an electrode pad to which the semiconductor photodetector is bonded, and an electrode pad disposed adjacent the electrode pad. The high frequency grounding pad is connected to the electrode pad by a wire.Type: ApplicationFiled: October 29, 2013Publication date: August 14, 2014Applicant: Mitsubishi Electric CorporationInventors: Yuji Masuyama, Masaharu Nakaji, Yoshihiro Hisa
-
Patent number: 7947517Abstract: Semiconductor laser elements are formed on a common substrate. Au plating is formed on principal surfaces of the semiconductor laser elements. The semiconductor laser elements are mounted on a package with solder applied to the Au plating. Areas opposed to each other across a light-emitting area of each semiconductor laser element are designated first and second areas. Average thickness of the Au plating is different in the first and second areas of each semiconductor laser element.Type: GrantFiled: December 10, 2009Date of Patent: May 24, 2011Assignee: Mitsubishi Electric CorporationInventor: Yoshihiro Hisa
-
Publication number: 20110013655Abstract: In a semiconductor laser device a dual wavelength semiconductor laser chip is joined onto a submount, junction down, to reduce built-in stress produced between the laser chip and the submount and to decrease polarization angles of the two respective lasers. SnAg solder is used to join the dual wavelength semiconductor laser chip onto the submount. When joining, with respect to each of the two lasers, a ratio of a distance between the center line of a waveguide and an end, placed at a lateral side of the laser chip, of a portion joining the laser chip and the submount, to a distance between the center line of the waveguide and another end, placed toward the center of the laser chip, of the portion joining the laser chip and the submount, falls within a range of 0.69 to 1.46.Type: ApplicationFiled: June 25, 2010Publication date: January 20, 2011Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Tadashi Takase, Hitoshi Tada, Hiroaki Maehara, Yoshihiro Hisa, Hitoshi Sakuma
-
Publication number: 20100093118Abstract: Semiconductor laser elements are formed on a common substrate. Au plating is formed on principal surfaces of the semiconductor laser elements. The semiconductor laser elements are mounted on a package with solder applied to the Au plating. Areas opposed to each other across a light-emitting area of each semiconductor laser element are designated first and second areas. Average thickness of the Au plating is different in the first and second areas of each semiconductor laser element.Type: ApplicationFiled: December 10, 2009Publication date: April 15, 2010Applicant: MITSUBISHI ELECTRIC CORPORATIONInventor: Yoshihiro Hisa
-
Patent number: 7653107Abstract: Semiconductor laser elements are formed on a common substrate. Au plating is formed on principal surfaces of the semiconductor laser elements. The semiconductor laser elements are mounted on a package with solder applied to the Au plating. Areas opposed to each other across a light-emitting area of each semiconductor laser element are designated first and second areas. Average thickness of the Au plating is different in the first and second areas of each semiconductor laser element.Type: GrantFiled: April 17, 2008Date of Patent: January 26, 2010Assignee: Mitsubishi Electric CorporationInventors: Yoshihiro Hisa, Tsutomu Yamaguchi, Takehiro Nishida, Kenji Hiramatsu
-
Patent number: 7550673Abstract: An electrode pattern for wire-bonding includes: a wire-bonding reference pattern indicating a reference position for determination of a wire-bonding position; and a wire-bonding recognition pattern. The distance between the reference position and a wire-bonding metal portion bonded to the electrode pattern and the distance between the wire-bonding recognition pattern and the wire-bonding metal portion satisfy predetermined relationships.Type: GrantFiled: March 5, 2008Date of Patent: June 23, 2009Assignee: Mitsubishi Electric CorporationInventors: Yoshihiro Hisa, Tsutomu Yamaguchi, Hideyuki Tanaka, Kazunori Matsuo
-
Publication number: 20090022197Abstract: Semiconductor laser elements are formed on a common substrate. Au plating is formed on principal surfaces of the other semiconductor laser elements. The semiconductor laser elements are mounted on a package with solder applied to the Au plating. Areas opposed to each other across a light-emitting area of each semiconductor laser element are designated first and second areas. Average thickness of the Au plating is different in the first and second areas of each semiconductor laser element.Type: ApplicationFiled: April 17, 2008Publication date: January 22, 2009Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Yoshihiro Hisa, Tsutomu Yamaguchi, Takehiro Nishida, Kenji Hiramatsu
-
Publication number: 20080230255Abstract: An electrode pattern for wire-bonding includes: a wire-bonding reference pattern indicating a reference position for determination of a wire-bonding position; and a wire-bonding recognition pattern. The distance between the reference position and a wire-bonding metal portion bonded to the electrode pattern and the distance between the wire-bonding recognition pattern and the wire-bonding metal portion satisfy predetermined relationships.Type: ApplicationFiled: March 5, 2008Publication date: September 25, 2008Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Yoshihiro Hisa, Tsutomu Yamaguchi, Hideyuki Tanaka, Kazunori Matsuo
-
Patent number: 7023891Abstract: A semiconductor optical device which has a ridge structure includes a waveguide area between paired mesa trenches; first and second mount areas disposed outside the mesa trenches; a first spacer layer disposed in a first mount area and a second spacer layer disposed in a second mount area; a first metal layer electrically connected to an upper cladding layer in the waveguide area and extending from the waveguide area over the first mount area; and a second metal layer disposed over the second mount area. Thicknesses from a back surface of the semiconductor optical device to the first metal layer in the first mount area and to the second metal layer in the second mount area are both larger than thickness from the back surface to the first metal layer in the waveguide area.Type: GrantFiled: May 2, 2003Date of Patent: April 4, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hideki Haneda, Go Sakaino, Yoshihiro Hisa
-
Publication number: 20030210721Abstract: A semiconductor optical device which has a ridge structure comprises: a waveguide area which is between paired mesa trenches; first and second mount areas disposed outside the mesa trenches; a first spacer layer disposed in the first mount area and a second spacer layer disposed in the second mount area; a first metal layer which is electrically connected to the upper cladding layer in the waveguide area and which expands from the waveguide area over the first mount area; and a second metal layer which is disposed over the second mount area. The height from the back surface to the first metal layer in the first mount area and the height from the back surface to the second metal layer in the second mount area are both higher than the height from the back surface to the first metal layer in the waveguide area.Type: ApplicationFiled: May 2, 2003Publication date: November 13, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Hideki Haneda, Go Sakaino, Yoshihiro Hisa
-
Patent number: 5659562Abstract: A semiconductor laser has a semiconductor substrate, an active layer disposed indirectly on the semiconductor substrate, a barrier layer disposed on the active layer having a larger band gap energy than the active layer, and an embedded diffraction grating of stripes of a semiconductor material, the stripes having a width in a resonator length direction, a length perpendicular to the resonator length direction, and a thickness, and are embedded in the barrier layer. The stripes have a constant pitch along the resonator length direction of the waveguide path, a constant thickness, and a width that changes in the resonator length direction or the width is constant and the thickness is changed.Type: GrantFiled: August 31, 1995Date of Patent: August 19, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiro Hisa
-
Patent number: 5551584Abstract: In a method of producing a .lambda.Type: GrantFiled: March 8, 1995Date of Patent: September 3, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiro Hisa
-
Patent number: 5410168Abstract: An infrared imaging device includes a first conductivity type first semiconductor layer having a small energy band gap, a first conductivity type second semiconductor layer have a larger energy band gap and disposed on the first semiconductor layer, a light receiving region of the second conductivity type in the second semiconductor layer and extending into the first semiconductor layer, a second conductivity type region in the second semiconductor layer spaced from the light receiving region, an insulating layer on the second semiconductor layer, and an MIS electrode on the insulating layer between the light receiving region and the second conductivity type region. Recombination of signal charges produced by incident light in the light receiving region and leakage current at the surface of the second semiconductor layer at the light receiving region are reduced. In addition, the numerical aperture of the light receiving region is increased.Type: GrantFiled: October 29, 1993Date of Patent: April 25, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiro Hisa
-
Patent number: 5286610Abstract: A CEL material (11) is formed such that a first region (11a) thereof which is formed on a concave portion of a semiconductor substrate (1) is sufficiently thicker than a second region (11b) thereof which is formed on the other region. Light (4) is directed from above to the CEL material (11) for a predetermined period of time to render only the thin second region pervious to light to thereby expose part of a photoresist (2) which is under the second region (11b) by the illumination. Subsequently, the semiconductor substrate (1) is immersed in an appropriate solvent to remove only part of the photoresist (2) which is under the first region (11a). The part of the photoresist (2) which is under the second region 11b remains unremoved.The photoresist (2) can be patterned with the shape of the concave portion of the semiconductor substrate (1) accurately reflected therein.Type: GrantFiled: April 6, 1992Date of Patent: February 15, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiro Hisa
-
Patent number: 5168338Abstract: A solid-state imaging device includes a photodiode array having a plurality of pixels, each pixel including a second conductivity type region formed in a first conductivity type semiconductor layer, an electrode common to all the pixels and disposed on the first conductivity type semiconductor layer, a signal transfer part for transferring signal charges generated in the pixels and a DC voltage source for applying a DC voltage in a forward direction to the pixels. The reverse bias voltage applied to a photodiode due to the voltage applied by the signal input stage of the signal transfer part is canceled by the forward DC voltage applied to the common electrode. As a result, the operating points of the pixels are uniform when nearly zero bias voltage is applied to the pixels.Type: GrantFiled: May 18, 1992Date of Patent: December 1, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Norimasa Kumada, Yoshihiro Hisa, Yasuaki Yoshida
-
Patent number: 5156980Abstract: A method for producing a photodetector device includes depositing a plurality of spaced apart light absorption regions at intervals on a substrate, depositing an insulating layer on the substrate and covering the light absorption regions, producing a first conductivity type semiconductor layer on the insulating layer, and producing second conductivity type semiconductor regions by selectively diffusing impurities into regions of the first conductivity type semiconductor layer until the impurities reach the insulating layer.Type: GrantFiled: September 3, 1991Date of Patent: October 20, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiro Hisa
-
Patent number: 5115295Abstract: A photodetector device of a rear surface incident type includes a semi-insulating substrate transparent to light incident from the rear surface, a plurality of second conductivity type semiconductor regions disposed on the substrate in a first conductivity type semiconductor layer, a conductive light absorption layer disposed on at least one of the second conductivity type semiconductor regions, metal electrodes having a high reflectance of the incident light disposed on the light absorption layer and the second conductivity type semiconductor regions, and protection layers disposed on the first conductivity type semiconductor layer.Type: GrantFiled: October 19, 1990Date of Patent: May 19, 1992Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiro Hisa
-
Patent number: 5075748Abstract: A rear surface incident type photodetector device includes spaced apart light absorption regions on a semi-insulating substrate, a semi-insulating layer covering the light absorption regions on the semi-insulating substrate, a first conductivity type semiconductor region disposed on the semi-insulating layer opposite each light absorption regon, and second conductivity type semiconductor regions separating the first conductivity type regions and reaching the semi-insulating layer. A rear surface incident type photodetector device includes spaced apart insulating light absorption regions on a surface of a semi-insulating substrate, first conductivity type semiconductor regions covering the insulating light absorption, regions, and second conductivity type semiconductor regions separating the first conductivity type semiconductor regions and reaching the semi-insulating substrate.Type: GrantFiled: December 28, 1989Date of Patent: December 24, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiro Hisa
-
Patent number: 4994876Abstract: An infrared light detecting element which may be employed in a two-dimensional light detecting array includes a light responsive photodiode that generates electrical charges in response to incident light. The electrical charges are conveyed to a charge storage means and subsequently transferred to a charge coupled device. The charges are stored in potential wells produced opposite electrodes in a laminated structure including a semiconductor substrate on which one charge storage electrode is disposed and a first semiconductor layer disposed on the substrate on which a second charge storage electrode is disposed. The charge storage electrodes are interconnected in series or in parallel. Additional semiconductor layers and charge storage electrodes may be employed. The laminated structure produces a significant increase in the charge storage capacity of the device without increasing its area.Type: GrantFiled: August 28, 1989Date of Patent: February 19, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiro Hisa