Patents by Inventor Yoshihiro Hosoi
Yoshihiro Hosoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230403793Abstract: A wiring board includes an insulation substrate, a through-conductor, and a wiring conductor. The insulation substrate includes a first surface, a second surface opposite to the first surface, and a through-hole extending from the first surface to the second surface. The through-conductor is located in the through-hole and on an opening of the through-hole on a first surface side. The wiring conductor is located on the first surface and connected to the through-conductor. The through-conductor and the wiring conductor contain copper as a main component. The average size of Cu crystal grains in the through-conductor is larger than the average size of Cu crystal grains in the wiring conductor.Type: ApplicationFiled: October 27, 2021Publication date: December 14, 2023Applicant: KYOCERA CorporationInventors: Yuki TAKESHIMA, Yoshihiro HOSOI, Yuji KAMASE, Kyohei YAMASHITA
-
Patent number: 11823966Abstract: A wiring substrate includes an insulating substrate, a conductor layer and an interlayer. The insulating substrate contains AlN. The conductor layer contains Cu. The interlayer is located between the insulating substrate and the conductor layer. In the interlayer, between a first region near the insulating substrate and a second region near the conductor layer, Cu concentration is higher in the second region than in the first region, and Al concentration is higher in the first region than in the second region.Type: GrantFiled: November 29, 2019Date of Patent: November 21, 2023Assignee: KYOCERA CORPORATIONInventors: Kyohei Yamashita, Yoshihiro Hosoi
-
Patent number: 11792930Abstract: A wiring substrate includes an insulating substrate, a conductor and an Ni film. The insulating substrate has a first surface and a second surface on a side opposite the first surface, and contains AlN. The conductor is disposed on the first surface and contains Cu. The Ni film is disposed so as to extend across an upper surface and a side surface of the conductor to the first surface. Ti oxide is scattered so as to be at a plurality of points on the first surface.Type: GrantFiled: March 25, 2020Date of Patent: October 17, 2023Assignee: Kyocera CorporationInventors: Yuki Takeshima, Yoshihiro Hosoi
-
Publication number: 20220192022Abstract: A wiring substrate includes an insulating substrate, a conductor and an Ni film. The insulating substrate has a first surface and a second surface on a side opposite the first surface, and contains AlN. The conductor is disposed on the first surface and contains Cu. The Ni film is disposed so as to extend across an upper surface and a side surface of the conductor to the first surface. Ti oxide is scattered so as to be at a plurality of points on the first surface.Type: ApplicationFiled: March 25, 2020Publication date: June 16, 2022Applicant: KYOCERA CorporationInventors: Yuki TAKESHIMA, Yoshihiro HOSOI
-
Publication number: 20220037220Abstract: A wiring substrate includes an insulating substrate, a conductor layer and an interlayer. The insulating substrate contains AlN. The conductor layer contains Cu. The interlayer is located between the insulating substrate and the conductor layer. In the interlayer, between a first region near the insulating substrate and a second region near the conductor layer, Cu concentration is higher in the second region than in the first region, and Al concentration is higher in the first region than in the second region.Type: ApplicationFiled: November 29, 2019Publication date: February 3, 2022Applicant: KYOCERA CorporationInventors: Kyohei YAMASHITA, Yoshihiro HOSOI
-
Patent number: 9426887Abstract: A wiring board according to the present invention includes an insulating board; a first pad provided inwardly from a surface of the insulating board and electrically connected to an electrode of an electronic component; a second pad provided on the surface of the insulating board and electrically connected to a lead terminal. The first pad and the second pad include a first layer region made of copper and a second layer region arranged on the first layer region and made of nickel, and a thickness of the second layer region of the second pad is larger than a thickness of the second layer region of the first pad.Type: GrantFiled: June 26, 2013Date of Patent: August 23, 2016Assignee: Kyocera CorporationInventors: Yoshihiro Hosoi, Takayuki Taguchi, Hidetoshi Yugawa
-
Patent number: 8957321Abstract: A printed circuit board of the present invention includes a base body, a through-hole that penetrates through the base body in the thickness direction, and a through-hole conductor that covers an inner wall of the through-hole. The base body has a fiber layer including a plurality of glass fibers and a resin that covers the plurality of glass fibers. The glass fibers have a groove-shaped concavity on a surface exposed to the inner wall of the through-hole. The concavity is filled with a part of the through-hole conductor.Type: GrantFiled: September 26, 2012Date of Patent: February 17, 2015Assignee: KYOCERA SLC Technologies CorporationInventors: Masaaki Harazono, Yoshihiro Hosoi
-
Patent number: 8890001Abstract: A wiring board of the present invention includes a substrate including a woven fabric formed of a plurality of glass fibers and a resin covering the woven fabric; a plurality of through holes T penetrating through the substrate in a thickness direction thereof; and a plurality of through hole conductors adhered to inner walls of the through holes T respectively. The through holes T include a first through hole and a second through hole, and, in the woven fabric, the number of the glass fibers through which the first through hole penetrates is larger than the number of the glass fibers through which the second through hole penetrates. In the first and second through holes, portions thereof having narrowest widths are surrounded by the woven fabric, and the narrow width portion of the first through hole is smaller than the narrow width portion of the second through hole.Type: GrantFiled: January 25, 2013Date of Patent: November 18, 2014Assignee: Kyocera SLC Technologies CorporationInventors: Takayuki Nejime, Masaaki Harazono, Yoshihiro Hosoi
-
Patent number: 8735741Abstract: A circuit board comprises a substrate; a through hole penetrating the substrate along with a direction of a thickness thereof; and a through hole conductor covering an inner wall of the through hole. The substrate comprises a first fiber layer, a second fiber layer, and a resin layer arranged between the first fiber layer and the second fiber layer. Each of the first fiber layer and the second fiber layer has a plurality of fibers and a resin arranged among the plurality of the fibers. The resin layer contains a resin and doesn't contain a fiber. The inner wall of the through hole, in a cross-section view along with the direction of the thickness of the substrate, comprises a curved depression in the resin layer.Type: GrantFiled: November 21, 2011Date of Patent: May 27, 2014Assignee: Kyocera CorporationInventors: Masaaki Harazono, Yoshihiro Hosoi
-
Publication number: 20140000946Abstract: A wiring board according to the present invention includes an insulating board; a first pad provided inwardly from a surface of the insulating board and electrically connected to an electrode of an electronic component; a second pad provided on the surface of the insulating board and electrically connected to a lead terminal. The first pad and the second pad include a first layer region made of copper and a second layer region arranged on the first layer region and made of nickel, and a thickness of the second layer region of the second pad is larger than a thickness of the second layer region of the first pad.Type: ApplicationFiled: June 26, 2013Publication date: January 2, 2014Inventors: Yoshihiro HOSOI, Takayuki TAGUCHI, Hidetoshi YUGAWA
-
Publication number: 20120132462Abstract: A circuit board comprises a substrate; a through hole penetrating the substrate along with a direction of a thickness thereof; and a through hole conductor covering an inner wall of the through hole. The substrate comprises a first fiber layer, a second fiber layer, and a resin layer arranged between the first fiber layer and the second fiber layer. Each of the first fiber layer and the second fiber layer has a plurality of fibers and a resin arranged among the plurality of the fibers. The resin layer contains a resin and doesn't contain a fiber. The inner wall of the through hole, in a cross-section view along with the direction of the thickness of the substrate, comprises a curved depression in the resin layer.Type: ApplicationFiled: November 21, 2011Publication date: May 31, 2012Applicant: KYOCERA CORPORATIONInventors: Masaaki Harazono, Yoshihiro Hosoi
-
Publication number: 20060282907Abstract: To provide meat that is beneficial to human health, for the purpose to produce transgenic animals in which the content of unsaturated fatty acids increase is increased, transgenic animals characterized by increased content of unsaturated fatty acids that are beneficial to human health is provided by the present invention. Furthermore, the present invention also provides a method to enhance levels of unsaturated fatty acid in animals.Type: ApplicationFiled: January 30, 2003Publication date: December 14, 2006Applicants: KINKI UNIVERSITY, JAPAN SOCIETY FOR THE PROMOTION OF SCIENCEInventors: Kazuhiro Saeki, Kazuya Matsumoto, Mikio Kinoshita, Iwane Suzuki, Yoshitomo Taguchi, Koji Mikami, Masatsugu Ueda, Yoshihiro Hosoi, Norio Murata, Akira Iritani, Kouichiro Kano
-
Patent number: 7011862Abstract: An object of the invention is to prevent the color on a surface of a plated metal layer from changing. The invention is a wiring substrate obtained by forming a wiring conductor made of a metal having a high melting point on an insulator, and coating a surface of the wiring conductor with an electroless plated metal layer, wherein the electroless plated metal layer contains an element of Group 1B and is free from lead.Type: GrantFiled: November 9, 2004Date of Patent: March 14, 2006Assignee: Kyocera CorporationInventors: Yoshihiro Hosoi, Yasuo Fukuda
-
Publication number: 20050084661Abstract: An object of the invention is to prevent the color on a surface of a plated metal layer from changing. The invention is a wiring substrate obtained by forming a wiring conductor made of a metal having a high melting point on an insulator, and coating a surface of the wiring conductor with an electroless plated metal layer, wherein the electroless plated metal layer contains an element of Group 1B and is free from lead.Type: ApplicationFiled: November 9, 2004Publication date: April 21, 2005Inventors: Yoshihiro Hosoi, Yasuo Fukuda
-
Patent number: 6841885Abstract: An object of the invention is to prevent the color on a surface of a plated metal layer from changing. The invention is a wiring substrate obtained by forming a wiring conductor made of a metal having a high melting point on an insulator, and coating a surface of the wiring conductor with an electroless plated metal layer, wherein the electroless plated metal layer contains an element of Group 1B and is free from lead.Type: GrantFiled: May 24, 2002Date of Patent: January 11, 2005Assignee: Kyocera CorporationInventors: Yoshihiro Hosoi, Yasuo Fukuda
-
Publication number: 20020175397Abstract: An object of the invention is to prevent the color on a surface of a plated metal layer from changing. The invention is a wiring substrate obtained by forming a wiring conductor made of a metal having a high melting point on an insulator, and coating a surface of the wiring conductor with an electroless plated metal layer, wherein-the electroless plated metal layer contains an element of Group 1B and is free from lead.Type: ApplicationFiled: May 24, 2002Publication date: November 28, 2002Applicant: KYOCERA CORPORATIONInventors: Yoshihiro Hosoi, Yasuo Fukuda
-
Patent number: 5760466Abstract: A semiconductor device including an insulating substrate which has a semiconductor element-mounting portion for mounting a semiconductor element on the center of its top surface, and a plurality of metallized wiring layers which lead outward extendedly from the periphery of the semiconductor element-mounting portion to the rim of the top surface; a semiconductor element which is mounted on the semiconductor element-mounting portion and has electrodes connected to the inner end sections of the metallized wiring layers; a plurality of outer lead terminals which are attached to the outer end sections of the metallized wiring layers to connect the semiconductor element to an exterior electric circuit; and a molding resin which covers the insulating substrate, the semiconductor element and part of the outer lead terminals.Type: GrantFiled: June 20, 1997Date of Patent: June 2, 1998Assignee: Kyocera CorporationInventors: Kenji Masuri, Yoshihiro Hosoi, Hisashi Kojima, Kazuhito Imuta, Hiroshi Matsumoto
-
Patent number: 4626479Abstract: A surface metal layer composed mainly of gold is formed on the surface of a metallized metal layer on an insulating substrate through a first intermediate metal layer composed of a nickel/boron alloy and a second intermediate metal layer composed of a nickel/phosphorus alloy. In this surface layer, appearance of stains or occurrence of blistering is prevented, and this surface metal layer is excellent in appearance characteristics, electric characteristics and durability.Type: GrantFiled: October 23, 1985Date of Patent: December 2, 1986Assignee: Kyocera CorporationInventors: Yoshihiro Hosoi, Takaaki Fujioka