Abstract: A memory (1) in a non contact type IC card (100) includes a data protection region (B2) storing data requiring security and an region (B1) storing other data. A main control circuit (2) generates data to be stored and designates a location for data storage in the region (B1) or the data protection region (B2) according to a content of the data. An address non selecting circuit (4) selects whether the generated data is to be written into the location in the data protection region (B2) designated by the main control circuit (2) according to a state of a state setting circuit (3).

Abstract: A data communication apparatus according to the present invention can be used both in one-wave mode and two-wave mode, and includes: first and second tuning circuits (1, 2); a power supply circuit (3) connected to first tuning circuit (1) for generating power by a signal received by first tuning circuit (1); an information processing circuit (15) connected to first tuning circuit (1) or second tuning circuit (2) through a switching circuit (6) and including a detection circuit (7), a decoder (8), an encoder (10) and the like. Information processing circuit (15) includes a switch control circuit (14) detecting if the mode of the received radio wave is one-wave mode or two-wave mode in accordance with an output from first tuning circuit (1) and controlling switching circuit (6) such that detection circuit (7) is connected to one of first and second tuning circuits (1, 2).

Abstract: An IC card capable of effectively preventing electrostatic breakdown of an IC even when it is charged with static electricity is provided. In the IC card, a discharging member (2 to 5) of a non-insulator is provided at a portion of IC card (1). Thus, even when IC card (1) is charged with static electricity, discharge current of static electricity is discharged through discharging member (2 to 5), so that the discharge current is effectively prevented form flowing into IC (101). As a result, even when IC card (1) is charged with static electricity, electrostatic breakdown of IC (101) is prevented, whereby breakdown or malfunction of entire IC card (1) is avoided.

Abstract: A highly rigid ceramic frame (38) is embedded in a layer of a core member (34). An IC chip (42) is held inside (38a) via an elastic member (40). IC chip 42 arranged inside (38a) will not be greatly deformed even when a strong bending, torsional, or pressing force is applied to the IC card (30). An impact, when exerted on the IC card (30), will not be directly conveyed to the IC chip (42). A coil (44) formed by printing and the like is provided at an upper end face (38b) of the ceramic frame (38). The coil (44) is connected to the IC chip (42) by a wire (46). By forming the IC chip (42), the ceramic frame (38) and the coil (44) integrally in advance, the workability in fabrication is improved. Therefore, a circuit chip mounted card of high reliability and low fabrication cost can be provided.

Abstract: A memory (1) in a non contact type IC card (100) includes a data protection region (B2) storing data requiring security and an region (B1) storing other data. A main control circuit (2) generates data to be stored and designates a location for data storage in the region (B1) or the data protection region (B2) according to a content of the data. An address non selecting circuit (4) selects whether the generated data is to be written into the location in the data protection region (B2) designated by the main control circuit (2) according to a state of a state setting circuit (3).

Abstract: A data communication apparatus according to the present invention can be used both in one-wave mode and two-wave mode, and includes: first and second tuning circuits (1, 2); a power supply circuit (3) connected to first tuning circuit (1) for generating power by a signal received by first tuning circuit (1); an information processing circuit (15) connected to first tuning circuit (1) or second tuning circuit (2) through a switching circuit (6) and including a detection circuit (7), a decoder (8), an encoder (10) and the like. Information processing circuit (15) includes a switch control circuit (14) detecting if the mode of the received radio wave is one-wave mode or two-wave mode in accordance with an output from first tuning circuit (1) and controlling switching circuit (6) such that detection circuit (7) is connected to one of first and second tuning circuits (1, 2).

Abstract: Oppositely arranged bumps (82,84) are electrically connected by connecting two IC chips (76,78) through an anisotropic conductor (80) to form an IC chip module (74). With IC chip module (74) having such structure, two IC chips (76,78) provided with functions of a processing portion and an antenna are simply stacked to provide a function for communication, and arrangement of interconnection outside IC chip (76,78) is not necessary. Thus, accidental breakage of the interconnection is avoided and assembly is extremely facilitated. Therefore, a circuit chip mounted card with higher reliability and reduced manufacturing cost and the like can be provided.

Abstract: Oppositely arranged bumps (82,84) are electrically connected by connecting two IC chips (76,78) through an anisotropic conductor (80) to form an IC chip module (74). With IC chip module (74) having such structure, two IC chips (76,78) provided with functions of a processing portion and an antenna are simply stacked to provide a function for communication, and arrangement of interconnection outside IC chip (76,78) is not necessary. Thus, accidental breakage of the interconnection is avoided and assembly is extremely facilitated. Therefore, a circuit chip mounted card with higher reliability and reduced manufacturing cost and the like can be provided.

Abstract: There is provided a liquid crystal display device including a first transparent substrate and a second transparent substrate pasted to each other via a liquid crystal sealing space in between, and provided with a predetermined display region. The first transparent substrate is integrally formed with an extension extending further than an edge of the second transparent substrate and longitudinally of the edge of the second transparent substrate. The extension is provided with at least one semiconductor chip having a longitudinal axis laid longitudinally of the extension. The extension is formed with an external connection terminal region including a plurality of terminals. The external connection terminal region does not overlap the semiconductor chip widthwise of the extension.

Abstract: A liquid crystal display includes a compact LC panel. The LC panel includes transparent front and rear plates between which a liquid crystal layer is disposed. The rear plate has a projecting portion which avoids facing the front plate. The projecting portion carries a semiconductor chip for display control and two capacitors cooperating with the semiconductor chip. One of the capacitors, first capacitor, is located farther from the semiconductor chip than the other or second capacitor is. A first conductor is provided for connecting the first capacitor to the semiconductor chip, and a second conductor is provided for connecting the second capacitor to the same chip. The first and the second conductors are made substantially equal in electrical resistance.

Abstract: A non-contact IC card (1, 2, 30, 50) includes a substrate (10), a coil (12, 32, 52, 57) provided on substrate (10), and an IC chip (11, 31, 51) electrically connected to a coil (12, 32, 52, 57) and having a main surface (11c, 31c, 51e). IC chip has a terminal (11a, 11b, 31a, 31b, 51a, 51b, 51c, 51d) formed in main surface (11c, 31c, 51e). Coil (12, 32, 52, 57) has a coil inner end (12b, 32b, 52b, 57b) electrically connected to a terminal (11b, 31b, 51b, 51d) and a coil outer end (12a, 32a, 52a, 57a) electrically connected to a terminal (11a, 31a, 51a, 57c). IC chip (11, 31, 51) is provided above coil (12, 32, 52, 57) such that coil inner end (12b, 32b, 52b, 57b) is positioned in vicinity of terminal (11b, 31b, 51b, 51d) and coil outer end (12a, 32a, 52a, 57a) is positioned in vicinity of terminal (11a, 31a, 51a, 51c).

Abstract: A liquid crystal display includes a compact LC panel. The LC panel includes transparent front and rear plates between which a liquid crystal layer is disposed. The rear plate has a projecting portion which avoids facing the front plate. The projecting portion carries a semiconductor chip for display control and two capacitors cooperating with the semiconductor chip. One of the capacitors, first capacitor, is located farther from the semiconductor chip than the other or second capacitor is. A first conductor is provided for connecting the first capacitor to the semiconductor chip, and a second conductor is provided for connecting the second capacitor to the same chip. The first and the second conductors are made substantially equal in electrical resistance.

Abstract: An integrated circuit device having a chip-on-chip structure comprises a first IC chip, a second IC chip arranged on the first IC chip with surfaces of the first and second IC chips facing each other and electrically connected to the first IC chip by way of bonding, one or more conductor materials, and a substrate to which an electric potential is given and on which the first and second IC chips are mounted, wherein the conductor material is arranged either between the first and second IC chips or on an opposite surface of the second IC chip to the surface facing the first IC chip, and electrically connected to the substrate so as to provide a shielding effect for reducing malfunctions of the device that are caused by noise.

Abstract: An IC card which can normally perform the next data communication processing if there is an abnormality in data communication is provided. When abnormality determination circuit 1 determines that the previous data reception state is normal, before newly received data to be held DA is stored in a data holding memory 2, IC card 100 saves data in a region to write data DA into a data protection memory 3. Meanwhile if abnormality determination circuit 1 determines that the previous data reception state is abnormal, data in data holding memory 2 is recovered using data which has been saved in data protection memory 3 before accessing to data holding memory 2 is started.

Abstract: A circuit chip mounted card has a processing-circuit layer 106 in which is constructed a processing unit including a non-volatile memory, a modulation/demodulation circuit and a capacitor for providing a process associated with communication. In the processing-circuit layer is also constructed a coil 44 of a looped metal wire. Communicating function is completely provided only by a single IC chip 104 with the function of the processing unit and that of an antenna integrated therewith. Thus IC chip 104 does not require external wiring and will thus not suffer from an accidentally cut-off wire or the like. It is also dispensed with an operation to connect wires so that the card can extremely readily be fabricated. Thus a circuit chip mounted card can be obtained which is highly reliable and reduces the cost for manufacturing the same.

Abstract: A memory stores optimum capacitance values of a variable capacitor obtained by measuring in advance depending on temperatures. In practical use, a controller reads an optimum capacitance value from the memory according to a temperature obtained by a temperature sensor, and sets a capacitance value of the variable capacitor to the optimum capacitance value. Thus, a tuning frequency can be always adjusted to the frequency of a radio wave transmitted. Also, deviation of the tuning frequency due to variations in the production process can be remedied by varying the capacitance value according to data stored in the memory.

Abstract: The outputted voltage of a rectifier 3 is detected by a voltage detector circuit 17. When the detected voltage value is low (received radio wave is weak, distance is long), a controller 20 turns off a switch 16 to connect only a capacitor 14 to the output of the rectifier 3, so that the capacitances of the capacitors are decreased and the build up of a power voltage is accelerated. On the other hand, when the detected voltage value is higher than a prescribed level (received radio wave is powerful, distance is short), the controller 20 turns on the switch 16 to connect capacitors 14, 15 in parallel with the output of the rectifier 3, so that the capacitances of the capacitors are increased and a ripple is fully removed. Thus, communications can be made while preventing a malfunction due to the ripple.

Abstract: A memory stores correction coefficients for correcting variations of resistance values of coils L.sub.s and L.sub.c depending upon a temperature. A temperature or a resistance value of a cross coil meter is detected, and an output of a microcomputer is corrected using a correction coefficient stored in the memory. In accordance with the corrected output, a current amount to be supplied to the cross coil meter is controlled. Therefore, the cross coil meter can receive a predetermined amount of current regardless of a temperature variation.

Abstract: A state memory circuit responsive to a selection signal indicative of either the first television system or the second television system selected according to an external setting operation and adapted to be set to a logical "1" or "0" state when the selection signal indicates that the first television system is selected, the state of the state memory circuit being alternated between "1" and "0" for every signal according to the burst flag pulse when the selection signal selects the second television system, and a timing circuit for outputting the state of the state memory circuit at a timing before a leading edge of the burst flag pulse or after a trailing edge of the burst flag pulse and responds to an even number of burst signals in one frame and generates a color video signal suitable to the first or the second television system according to the selection signal.

Abstract: An electric power circuit for telephone set use utilizing a power source drawn from a telephone circuit line. Alternating current components superimposed on a supply voltage, which is taken out by means of a by-pass capacitor, are delivered to a downstream-side of the common-base of an input-side transistor comprised in a current mirror circuit. A constant value of direct-current, which is the same magnitude as a potential difference between the supply voltage and a potential of the common-base of the current mirror circuit, is obtained at the input side transistor by varying the potential of the common base in accordance with fluctuations due to a.c. components superimposed on the supply voltage. An amplified direct-current is output from the output-side transistor capable of producing a magnitude of current in proportion to that of the input-side current.