Patents by Inventor Yoshihiro Inada

Yoshihiro Inada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020171771
    Abstract: An absolute-value difference arithmetic section obtains an absolute-value difference from a first component and a second component. A component discriminating section or a signal discriminating section (circuit) discriminates an inputted chroma signal by phase discrimination and distance discrimination using the absolute-value difference. A correction executing section corrects the phase of the inputted chroma signal using the absolute-value difference. The absolute-value difference arithmetic section is formed by an adder and/or a subtracter on a small circuit scale.
    Type: Application
    Filed: April 9, 2002
    Publication date: November 21, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Yoshihiro Inada, Shinji Yamashita
  • Patent number: 6369739
    Abstract: The AGC circuit is provided with an analog variable gain amplifying circuit which includes a plurality of fixed gain amplifiers and a selector for selecting one of the output signals of the plurality of fixed gain amplifiers, an A/D converter for receiving the selected output signal from the variable gain amplifying circuit, a digital band pass filter which allows only the burst signal and the color signal in the output signal from the A/D converter to pass through, and a digital AGC/detection circuit for controlling the gain of the variable gain amplifying circuit such that the burst signal remains stable and for amplifying the digital signal to obtain a digital output color signal such that the detected burst signal becomes equal in level to the digital reference signal. Thus, a more stable output signal can be obtained even with the variation in the ambient temperature or the power supply voltage.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: April 9, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric System LSI Design
    Inventors: Yoshihiro Inada, Shinji Yamashita
  • Patent number: 6356145
    Abstract: A demodulator circuit including: a signal generating circuit for generating a sine-wave signal and a cosine-wave signal whose frequencies are same as that of the carrier wave of a modulated signal, a multiplying circuit for multiplying the modulated signal by the sine-wave signal and the cosine-wave signal generated by the signal generating circuit, and a filtering circuit for eliminating the frequency twice as high as that of the carrier wave from each of the results of the computation conducted by the multiplying circuit. Due to this, no restriction is imposed by the frequency of the system clock signal in configuring the system as a whole.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: March 12, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric System LSI Design Corporation
    Inventor: Yoshihiro Inada
  • Patent number: 6103167
    Abstract: A sandwich molded article comprising a thick skin or outer layer, a thin skin or outer layer, and a core layer surrounded by these skins or outer layers. A process for producing said sandwich molded article by the use of a mold(s) which comprises adjusting the temperature of an inner surface of the mold corresponding to a skin portion of the molding desired to be made thick, to a temperature lower than that of an inner surface of the mold corresponding to a skin portion of the molding desired to be made thin; injecting a skin material in a softened state into the mold; and then injecting a core layer material in a softened state into the skin material. According to the present invention, there can be obtained a sandwich molded article having a core layer from which the distances to the obverse and the reverse of the molded article are different. This molded article can be given a satisfactory decorative surface and has deformation-preventing ability.
    Type: Grant
    Filed: August 11, 1997
    Date of Patent: August 15, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hiroshi Mukai, Yasunobu Teramoto, Yoshihiro Inada, Hirohisa Narukawa
  • Patent number: 5954784
    Abstract: Start points of a misfire determining interval in the cylinders of an engine are specified by counting Pos signals starting from the appearance of a Ref signal in a specific cylinder. The Pos signals output from the Ref signal in each cylinder to the start point of the misfire determining interval are also counted as RGPHS after engine startup, and a shift of the misfire determining interval is detected by comparing for example the sum total of RGPHS for all cylinders and the sum total on the immediately preceding occasion. Correction of the misfire determining interval by a learnt value is stopped according to this shift. Preferably, correction of the misfire determining interval by the learnt value is restarted after making all misfire determining intervals the same by correcting for the shift.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: September 21, 1999
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Yoshihiro Inada, Youichi Kishimoto
  • Patent number: 5920008
    Abstract: A diagnostic apparatus applicable to diagnosis of engine misfire. A diagnostic result is produced for each of at least two diagnoses related to each other. Only one of the diagnostic results having a higher degree of necessity is retained to indicate a malfunction.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: July 6, 1999
    Assignee: Nissan Motor Co., Ltd
    Inventors: Youichi Kishimoto, Yoshihiro Inada
  • Patent number: 5539343
    Abstract: There is disclosed a horizontal synchronizing signal generating circuit for generating a horizontal synchronizing signal which has no frequency variations and which is in phase with an entered composite synchronizing signal if the entered composite synchronizing signal is a nonstandard signal having a varying horizontal frequency. A horizontal counter circuit (5) counts a reference clock (V.sub.CL), and a window pulse generating circuit (4) outputs a window pulse signal (V.sub.W) which is low for a fixed time period when a counter output (V.sub.CT) equals a counter value (878) indicative of a standard output timing. A horizontal synchronizing signal separating circuit (1) outputs a horizontal synchronizing signal (V.sub.2) only when the composite synchronizing signal (V.sub.1) falls within the fixed time period. Then a horizontal phase judging circuit (2) outputs a standard signal flag (V.sub.3) and a synchronizing signal generating circuit (3) outputs the horizontal synchronizing signal (V.sub.
    Type: Grant
    Filed: April 4, 1995
    Date of Patent: July 23, 1996
    Assignees: Mitsubishi Electric Semiconductor Software Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinji Yamashita, Yoshihiro Inada, Miki Nishimoto
  • Patent number: 5534807
    Abstract: A sampling circuit is not susceptible to an influence of structural components and environmental changes. A phase difference detecting circuit (5) detects a deviation of a sampling clock (.phi.2) from optimal sampling timing and outputs a phase difference signal. On the other hand, a phase reference signal (ORG) which is used as a reference to determine a phase advance and a phase lag is generated by a phase reference detecting circuit (4). In accordance with these signals, a sampling clock shifting circuit (2) shifts the sampling clock (.phi.2) so that the sampling clock (.phi.2) is activated at optimal sampling timing. Sampling is performed in accordance with such a sampling clock (.phi.2), whereby a basic signal is generated from which the phase reference signal (ORG) and the phase difference signal (i.e., an equivalent signal (EQU) and a non-equivalent signal (UPDN)) are generated. By means of feedback control, the sampling clock is automatically activated at optimal sampling timing.
    Type: Grant
    Filed: March 21, 1995
    Date of Patent: July 9, 1996
    Assignees: Mitsubishi Electric Semiconductor Software Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihiro Inada, Shinji Yamashita, Miki Nishimoto
  • Patent number: 5433910
    Abstract: A orifice passage for introducing excessive resin into a disposal tab forming cavity is provided at one end of a main cavity in a mold for sandwich molding. The section of the orifice passage is thinner in the central portion than in the opposite sides thereof. A thermoplastic elastomer for forming an outer layer of the molding is injected into the main cavity and then talc-containing polypropylene for forming the core of the molding is injected. The flow rate of the resins flowing through the orifice passage at this time becomes substantially uniform over the entirety of the section. Therefore, the talc-containing polypropylene sufficiently extends toward the opposite sides of the main cavity.
    Type: Grant
    Filed: May 14, 1992
    Date of Patent: July 18, 1995
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hiroshi Mukai, Yasunobu Teramoto, Takahiko Sato, Yoshihiro Inada
  • Patent number: 5296928
    Abstract: A composite synchronizing signal separation circuit in which separation of the composite synchronizing signal by a digital circuit is realized and such trouble as adjusting the time constant is not needed and a phase shift is reduced: a horizontal interruption receiving circuit 1 which is reset by a timing pulse signal at the time point of 3/4 from the starting time point of one horizontal synchronizing period, and separates and outputs a horizontal synchronizing signal HD from a composite synchronizing signal SYNC; a schedule counter circuit 2 which is reset by the horizontal synchronizing signal HD and outputs count value while counting up to a predetermined value in one horizontal synchronizing period; a timing decoding circuit 3 which decodes the count value and respectively outputs timing pulse signals at the time points of 1/4, 1/2 and 3/4 from the starting time point of one horizontal synchronizing period; and a vertical interruption receiving circuit 4 which samples the composite synchronizing signal
    Type: Grant
    Filed: March 3, 1993
    Date of Patent: March 22, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinji Yamashita, Yoshihiro Inada
  • Patent number: 5254306
    Abstract: A mold for making a double layer molded product, such as a molded product of sandwich construction or a hollow molded product having a dam within the mold cavity adjacent its gate. The dam projects in a direction transverse to that in which the inner-forming material is injected, and a gap is defined between the dam and the walls of the cavity. With this configuration, the core thickness of the molded product of sandwich construction, or the skin thickness of the hollow molded product, are made uniform.
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: October 19, 1993
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshihiro Inada, Hiroshi Mukai, Yasunobu Teramoto, Hiroshisa Narukawa