Patents by Inventor Yoshihiro Kumazaki

Yoshihiro Kumazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120289038
    Abstract: In an embodiment, a semiconductor device includes a single-layer gate nonvolatile memory in which a floating gate is formed on a semiconductor substrate. The floating gate is formed above a diffusion layer serving as a control gate of the nonvolatile memory. The diffusion layer may be insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers may be formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film in an embodiment. The configuration described herein may realize a reliable semiconductor device in a low-cost process, may have a control gate which may withstand a high voltage applied when data is erased or written, and may prevent an operation error by minimizing variations in the threshold value, in some embodiments.
    Type: Application
    Filed: July 23, 2012
    Publication date: November 15, 2012
    Applicant: INTELLECTUAL VENTURES I LLC
    Inventor: Yoshihiro Kumazaki
  • Patent number: 8253186
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: August 28, 2012
    Assignee: Intellectual Ventures I LLC
    Inventor: Yoshihiro Kumazaki
  • Patent number: 7808033
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: October 5, 2010
    Inventor: Yoshihiro Kumazaki
  • Publication number: 20100090266
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Application
    Filed: October 8, 2009
    Publication date: April 15, 2010
    Inventor: Yoshihiro Kumazaki
  • Patent number: 7602007
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: October 13, 2009
    Inventor: Yoshihiro Kumazaki
  • Publication number: 20070029605
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Application
    Filed: July 27, 2006
    Publication date: February 8, 2007
    Inventor: Yoshihiro Kumazaki
  • Publication number: 20060151827
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film-such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Application
    Filed: March 8, 2006
    Publication date: July 13, 2006
    Inventor: Yoshihiro Kumazaki
  • Patent number: 7038269
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: May 2, 2006
    Assignee: Pegre Semiconductors, LLC.
    Inventor: Yoshihiro Kumazaki
  • Publication number: 20050077580
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Application
    Filed: September 30, 2004
    Publication date: April 14, 2005
    Applicant: Nippon Steel Corporation
    Inventor: Yoshihiro Kumazaki
  • Patent number: 6838360
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: January 4, 2005
    Assignee: Nippon Steel Corporation
    Inventor: Yoshihiro Kumazaki
  • Patent number: 6818943
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: November 16, 2004
    Assignee: Nippon Steel Corporation
    Inventor: Yoshihiro Kumazaki
  • Publication number: 20030052363
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Application
    Filed: October 15, 2002
    Publication date: March 20, 2003
    Inventor: Yoshihiro Kumazaki
  • Publication number: 20030047747
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Application
    Filed: October 15, 2002
    Publication date: March 13, 2003
    Inventor: Yoshihiro Kumazaki
  • Patent number: 6489650
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: December 3, 2002
    Assignee: Nippon Steel Corporation
    Inventor: Yoshihiro Kumazaki
  • Publication number: 20020008273
    Abstract: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with the diffusion layer by using the gate oxide film as a dielectric film. The diffusion layer immediately below the dielectric film is insulated from the semiconductor substrate by an insulating film such as a silicon oxide film. A pair of diffusion layers are formed in surface regions of the semiconductor substrate on the two sides of the floating gate extending on a tunnel oxide film.
    Type: Application
    Filed: April 23, 1998
    Publication date: January 24, 2002
    Inventor: YOSHIHIRO KUMAZAKI
  • Patent number: 5814875
    Abstract: A field shield element for isolating semiconductor devices formed on a common substrate. The field shield element comprises an electrode of a high melting point metal which may have a reduced thickness and which avoids punch through of a connection point through the field shield electrode during manufacture. By employing the shield gate electrode metal having a high melting point, the reduction in thickness of the shield gate electrode provides a corresponding reduction in thickness of the offset existing between the semiconductor device and the isolation structure formed with the field shield element. The shield gate electrode may be combined with metal silicon compounds, and metal nitrides to realize the foregoing benefits of avoiding punchthrough and reducing the offset.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: September 29, 1998
    Assignee: Nippon Steel Corporation
    Inventor: Yoshihiro Kumazaki