Patents by Inventor Yoshihiro Nakabo

Yoshihiro Nakabo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7046821
    Abstract: An image detection processor of the present invention enhances the processing speed of the calculation of the center of gravity or the like of a target with a simple constitution. The image detection processor arranges a plurality of image detection processing elements 1-1 to 1-64 on a plane. Each image detection processing element includes an adder circuit 15 which converts an output of a photoelectric conversion part 5 into digital signals and can receive the digital signals as an input in a matrix form. Cumulative adders are constituted by connecting the adder circuits 15 for respective rows. Series adders 2-1 to 2-8 which are connected in series respectively receive outputs of final stages of cumulative adders of respective rows as inputs and can cumulatively add these outputs.
    Type: Grant
    Filed: January 13, 2001
    Date of Patent: May 16, 2006
    Assignees: Nippon Precision Circuits, Inc.
    Inventors: Masatoshi Ishikawa, Idaku Ishii, Takashi Komuro, Yoshihiro Nakabo, Atsushi Yoshida
  • Publication number: 20010030690
    Abstract: An image detection processor of the present invention enhances the processing speed of the calculation of the center of gravity or the like of a target with a simple constitution. The image detection processor arranges a plurality of image detection processing elements 1-1 to 1-64 on a plane. Each image detection processing element includes an adder circuit 15 which converts an output of a photoelectric conversion part 5 into digital signals and can receive the digital signals as an input in a matrix form. Cumulative adders are constituted by connecting the adder circuits 15 for respective rows. Series adders 2-1 to 2-8 which are connected in series respectively receive outputs of final stages of cumulative adders of respective rows as inputs and can cumulatively add these outputs.
    Type: Application
    Filed: January 13, 2001
    Publication date: October 18, 2001
    Inventors: Masatoshi Ishikawa, Idaku Ishii, Takashi Komuro, Yoshihiro Nakabo, Atsushi Yoshida